Commit 25290858 authored by William Qiu's avatar William Qiu Committed by Conor Dooley
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dt-bindings: pwm: Add bindings for OpenCores PWM Controller 



Add bindings for OpenCores PWM Controller.

Signed-off-by: default avatarWilliam Qiu <william.qiu@starfivetech.com>
Reviewed-by: default avatarHal Feng <hal.feng@starfivetech.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parent 6613476e

Documentation/devicetree/bindings/pwm/opencores,pwm.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/pwm/opencores,pwm.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: OpenCores PWM controller



maintainers:

  - William Qiu <william.qiu@starfivetech.com>



description:

  The OpenCores PTC ip core contains a PWM controller. When operating in PWM

  mode, the PTC core generates binary signal with user-programmable low and

  high periods. All PTC counters and registers are 32-bit.



allOf:

  - $ref: pwm.yaml#



properties:

  compatible:

    items:

      - enum:

          - starfive,jh7100-pwm

          - starfive,jh7110-pwm

      - const: opencores,pwm-v1



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  resets:

    maxItems: 1



  "#pwm-cells":

    const: 3



required:

  - compatible

  - reg

  - clocks



additionalProperties: false



examples:

  - |

    pwm@12490000 {

        compatible = "starfive,jh7110-pwm", "opencores,pwm-v1";

        reg = <0x12490000 0x10000>;

        clocks = <&clkgen 181>;

        resets = <&rstgen 109>;

        #pwm-cells = <3>;

    };