Unverified Commit 252eafe1 authored by David Lechner's avatar David Lechner Committed by Mark Brown
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dt-bindings: spi: axi-spi-engine: convert to yaml 



This converts the axi-spi-engine binding to yaml.

There are a few minor fixes in the conversion:
* Added maintainers.
* Added descriptions for the clocks.
* Fixed the double "@" in the example.
* Added a comma between the clocks in the example.

Signed-off-by: default avatarDavid Lechner <dlechner@baylibre.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231117-axi-spi-engine-series-1-v1-1-cc59db999b87@baylibre.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 98b1cc82

Documentation/devicetree/bindings/spi/adi,axi-spi-engine.txt

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Analog Devices AXI SPI Engine controller Device Tree Bindings



Required properties:

- compatible		: Must be "adi,axi-spi-engine-1.00.a""

- reg			: Physical base address and size of the register map.

- interrupts		: Property with a value describing the interrupt

			  number.

- clock-names		: List of input clock names - "s_axi_aclk", "spi_clk"

- clocks		: Clock phandles and specifiers (See clock bindings for

			  details on clock-names and clocks).

- #address-cells	: Must be <1>

- #size-cells		: Must be <0>



Optional subnodes:

	Subnodes are use to represent the SPI slave devices connected to the SPI

	master. They follow the generic SPI bindings as outlined in spi-bus.txt.



Example:



    spi@@44a00000 {

		compatible = "adi,axi-spi-engine-1.00.a";

		reg = <0x44a00000 0x1000>;

		interrupts = <0 56 4>;

		clocks = <&clkc 15 &clkc 15>;

		clock-names = "s_axi_aclk", "spi_clk";



		#address-cells = <1>;

		#size-cells = <0>;



		/* SPI devices */

    };

Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/adi,axi-spi-engine.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Analog Devices AXI SPI Engine Controller



description: |

  The AXI SPI Engine controller is part of the SPI Engine framework[1] and

  allows memory mapped access to the SPI Engine control bus. This allows it

  to be used as a general purpose software driven SPI controller as well as

  some optional advanced acceleration and offloading capabilities.



  [1] https://wiki.analog.com/resources/fpga/peripherals/spi_engine



maintainers:

  - Michael Hennerich <Michael.Hennerich@analog.com>

  - Nuno Sá <nuno.sa@analog.com>



allOf:

  - $ref: /schemas/spi/spi-controller.yaml#



properties:

  compatible:

    const: adi,axi-spi-engine-1.00.a



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: The AXI interconnect clock.

      - description: The SPI controller clock.



  clock-names:

    items:

      - const: s_axi_aclk

      - const: spi_clk



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



unevaluatedProperties: false



examples:

  - |

    spi@44a00000 {

        compatible = "adi,axi-spi-engine-1.00.a";

        reg = <0x44a00000 0x1000>;

        interrupts = <0 56 4>;

        clocks = <&clkc 15>, <&clkc 15>;

        clock-names = "s_axi_aclk", "spi_clk";



        #address-cells = <1>;

        #size-cells = <0>;



        /* SPI devices */

    };