Commit 25323904 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'enic-use-all-the-resources-configured-on-vic' 

Nelson Escobar says:

====================
enic: Use all the resources configured on VIC

Allow users to configure and use more than 8 rx queues and 8 tx queues
on the Cisco VIC.

This series changes the maximum number of tx and rx queues supported
from 8 to the hardware limit of 256, and allocates memory based on the
number of resources configured on the VIC.

v3: https://lore.kernel.org/20241108-remove_vic_resource_limits-v3-0-3ba8123bcffc@cisco.com
v2: https://lore.kernel.org/20241024-remove_vic_resource_limits-v2-0-039b8cae5fdd@cisco.com
v1: https://lore.kernel.org/20241022041707.27402-2-neescoba@cisco.com
====================

Link: https://patch.msgid.link/20241113-remove_vic_resource_limits-v4-0-a34cf8570c67@cisco.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 025b2bbc a28ccf1d

drivers/net/ethernet/cisco/enic/enic.h

+39 −23
Original line number Diff line number Diff line
@@ -23,10 +23,8 @@ 


#define ENIC_BARS_MAX		6



#define ENIC_WQ_MAX		8

#define ENIC_RQ_MAX		8

#define ENIC_CQ_MAX		(ENIC_WQ_MAX + ENIC_RQ_MAX)

#define ENIC_INTR_MAX		(ENIC_CQ_MAX + 2)

#define ENIC_WQ_MAX		256

#define ENIC_RQ_MAX		256



#define ENIC_WQ_NAPI_BUDGET	256
@@ -162,6 +160,17 @@ struct enic_rq_stats { 
	u64 desc_skip;			/* Rx pkt went into later buffer */

};



struct enic_wq {

	spinlock_t lock;		/* spinlock for wq */

	struct vnic_wq vwq;

	struct enic_wq_stats stats;

} ____cacheline_aligned;



struct enic_rq {

	struct vnic_rq vrq;

	struct enic_rq_stats stats;

} ____cacheline_aligned;



/* Per-instance private data structure */

struct enic {

	struct net_device *netdev;
@@ -173,8 +182,8 @@ struct enic { 
	struct work_struct reset;

	struct work_struct tx_hang_reset;

	struct work_struct change_mtu_work;

	struct msix_entry msix_entry[ENIC_INTR_MAX];

	struct enic_msix_entry msix[ENIC_INTR_MAX];

	struct msix_entry *msix_entry;

	struct enic_msix_entry *msix;

	u32 msg_enable;

	spinlock_t devcmd_lock;

	u8 mac_addr[ETH_ALEN];
@@ -193,28 +202,25 @@ struct enic { 
	bool enic_api_busy;

	struct enic_port_profile *pp;



	/* work queue cache line section */

	____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];

	spinlock_t wq_lock[ENIC_WQ_MAX];

	struct enic_wq_stats wq_stats[ENIC_WQ_MAX];

	struct enic_wq *wq;

	unsigned int wq_avail;

	unsigned int wq_count;

	u16 loop_enable;

	u16 loop_tag;



	/* receive queue cache line section */

	____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];

	struct enic_rq_stats rq_stats[ENIC_RQ_MAX];

	struct enic_rq *rq;

	unsigned int rq_avail;

	unsigned int rq_count;

	struct vxlan_offload vxlan;

	struct napi_struct napi[ENIC_RQ_MAX + ENIC_WQ_MAX];

	struct napi_struct *napi;



	/* interrupt resource cache line section */

	____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];

	struct vnic_intr *intr;

	unsigned int intr_avail;

	unsigned int intr_count;

	u32 __iomem *legacy_pba;		/* memory-mapped */



	/* completion queue cache line section */

	____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX];

	struct vnic_cq *cq;

	unsigned int cq_avail;

	unsigned int cq_count;

	struct enic_rfs_flw_tbl rfs_h;

	u32 rx_copybreak;
@@ -272,18 +278,28 @@ static inline unsigned int enic_msix_wq_intr(struct enic *enic, 
	return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;

}



static inline unsigned int enic_msix_err_intr(struct enic *enic)

{

	return enic->rq_count + enic->wq_count;

}

/* MSIX interrupts are organized as the error interrupt, then the notify

 * interrupt followed by all the I/O interrupts.  The error interrupt needs

 * to fit in 7 bits due to hardware constraints

 */

#define ENIC_MSIX_RESERVED_INTR 2

#define ENIC_MSIX_ERR_INTR	0

#define ENIC_MSIX_NOTIFY_INTR	1

#define ENIC_MSIX_IO_INTR_BASE	ENIC_MSIX_RESERVED_INTR

#define ENIC_MSIX_MIN_INTR	(ENIC_MSIX_RESERVED_INTR + 2)



#define ENIC_LEGACY_IO_INTR	0

#define ENIC_LEGACY_ERR_INTR	1

#define ENIC_LEGACY_NOTIFY_INTR	2



static inline unsigned int enic_msix_err_intr(struct enic *enic)

{

	return ENIC_MSIX_ERR_INTR;

}



static inline unsigned int enic_msix_notify_intr(struct enic *enic)

{

	return enic->rq_count + enic->wq_count + 1;

	return ENIC_MSIX_NOTIFY_INTR;

}



static inline bool enic_is_err_intr(struct enic *enic, int intr)

drivers/net/ethernet/cisco/enic/enic_ethtool.c

+4 −4
Original line number Diff line number Diff line
@@ -337,7 +337,7 @@ static void enic_get_ethtool_stats(struct net_device *netdev, 
	for (i = 0; i < NUM_ENIC_GEN_STATS; i++)

		*(data++) = ((u64 *)&enic->gen_stats)[enic_gen_stats[i].index];

	for (i = 0; i < enic->rq_count; i++) {

		struct enic_rq_stats *rqstats = &enic->rq_stats[i];

		struct enic_rq_stats *rqstats = &enic->rq[i].stats;

		int index;



		for (j = 0; j < NUM_ENIC_PER_RQ_STATS; j++) {
@@ -346,7 +346,7 @@ static void enic_get_ethtool_stats(struct net_device *netdev, 
		}

	}

	for (i = 0; i < enic->wq_count; i++) {

		struct enic_wq_stats *wqstats = &enic->wq_stats[i];

		struct enic_wq_stats *wqstats = &enic->wq[i].stats;

		int index;



		for (j = 0; j < NUM_ENIC_PER_WQ_STATS; j++) {
@@ -695,8 +695,8 @@ static void enic_get_channels(struct net_device *netdev, 


	switch (vnic_dev_get_intr_mode(enic->vdev)) {

	case VNIC_DEV_INTR_MODE_MSIX:

		channels->max_rx = ENIC_RQ_MAX;

		channels->max_tx = ENIC_WQ_MAX;

		channels->max_rx = min(enic->rq_avail, ENIC_RQ_MAX);

		channels->max_tx = min(enic->wq_avail, ENIC_WQ_MAX);

		channels->rx_count = enic->rq_count;

		channels->tx_count = enic->wq_count;

		break;

drivers/net/ethernet/cisco/enic/enic_main.c

+231 −155

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/cisco/enic/enic_res.c

+25 −17

File changed.

Preview size limit exceeded, changes collapsed.