Loading arch/sh/kernel/ptrace_64.c +4 −4 Original line number Diff line number Diff line Loading @@ -74,9 +74,9 @@ get_fpu_long(struct task_struct *task, unsigned long addr) } if (last_task_used_math == task) { grab_fpu(); enable_fpu(); fpsave(&task->thread.fpu.hard); release_fpu(); disable_fpu(); last_task_used_math = 0; regs->sr |= SR_FD; } Loading Loading @@ -110,9 +110,9 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data) fpinit(&task->thread.fpu.hard); set_stopped_child_used_math(task); } else if (last_task_used_math == task) { grab_fpu(); enable_fpu(); fpsave(&task->thread.fpu.hard); release_fpu(); disable_fpu(); last_task_used_math = 0; regs->sr |= SR_FD; } Loading arch/sh/kernel/traps_64.c +4 −4 Original line number Diff line number Diff line Loading @@ -617,9 +617,9 @@ static int misaligned_fpu_load(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { grab_fpu(); enable_fpu(); fpsave(¤t->thread.fpu.hard); release_fpu(); disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } Loading Loading @@ -690,9 +690,9 @@ static int misaligned_fpu_store(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { grab_fpu(); enable_fpu(); fpsave(¤t->thread.fpu.hard); release_fpu(); disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } Loading include/asm-sh/processor_64.h +13 −2 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <asm/page.h> #include <asm/types.h> #include <asm/cache.h> #include <asm/ptrace.h> #include <asm/cpu/registers.h> /* Loading Loading @@ -218,7 +219,7 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); * FPU lazy state save handling. */ static inline void release_fpu(void) static inline void disable_fpu(void) { unsigned long long __dummy; Loading @@ -230,7 +231,7 @@ static inline void release_fpu(void) : "r" (SR_FD)); } static inline void grab_fpu(void) static inline void enable_fpu(void) { unsigned long long __dummy; Loading @@ -242,6 +243,16 @@ static inline void grab_fpu(void) : "r" (~SR_FD)); } static inline void release_fpu(struct pt_regs *regs) { regs->sr |= SR_FD; } static inline void grab_fpu(struct pt_regs *regs) { regs->sr &= ~SR_FD; } /* Round to nearest, no exceptions on inexact, overflow, underflow, zero-divide, invalid. Configure option for whether to flush denorms to zero, or except if a denorm is encountered. */ Loading Loading
arch/sh/kernel/ptrace_64.c +4 −4 Original line number Diff line number Diff line Loading @@ -74,9 +74,9 @@ get_fpu_long(struct task_struct *task, unsigned long addr) } if (last_task_used_math == task) { grab_fpu(); enable_fpu(); fpsave(&task->thread.fpu.hard); release_fpu(); disable_fpu(); last_task_used_math = 0; regs->sr |= SR_FD; } Loading Loading @@ -110,9 +110,9 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data) fpinit(&task->thread.fpu.hard); set_stopped_child_used_math(task); } else if (last_task_used_math == task) { grab_fpu(); enable_fpu(); fpsave(&task->thread.fpu.hard); release_fpu(); disable_fpu(); last_task_used_math = 0; regs->sr |= SR_FD; } Loading
arch/sh/kernel/traps_64.c +4 −4 Original line number Diff line number Diff line Loading @@ -617,9 +617,9 @@ static int misaligned_fpu_load(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { grab_fpu(); enable_fpu(); fpsave(¤t->thread.fpu.hard); release_fpu(); disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } Loading Loading @@ -690,9 +690,9 @@ static int misaligned_fpu_store(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { grab_fpu(); enable_fpu(); fpsave(¤t->thread.fpu.hard); release_fpu(); disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } Loading
include/asm-sh/processor_64.h +13 −2 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <asm/page.h> #include <asm/types.h> #include <asm/cache.h> #include <asm/ptrace.h> #include <asm/cpu/registers.h> /* Loading Loading @@ -218,7 +219,7 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); * FPU lazy state save handling. */ static inline void release_fpu(void) static inline void disable_fpu(void) { unsigned long long __dummy; Loading @@ -230,7 +231,7 @@ static inline void release_fpu(void) : "r" (SR_FD)); } static inline void grab_fpu(void) static inline void enable_fpu(void) { unsigned long long __dummy; Loading @@ -242,6 +243,16 @@ static inline void grab_fpu(void) : "r" (~SR_FD)); } static inline void release_fpu(struct pt_regs *regs) { regs->sr |= SR_FD; } static inline void grab_fpu(struct pt_regs *regs) { regs->sr &= ~SR_FD; } /* Round to nearest, no exceptions on inexact, overflow, underflow, zero-divide, invalid. Configure option for whether to flush denorms to zero, or except if a denorm is encountered. */ Loading