Commit 25815473 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/cdclk: Give the squash waveform length a name



Replace the slightly magic 'size = 16' with a bit more descriptive
name. We'll have another user for this value later on.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-3-ville.syrjala@linux.intel.com


Reviewed-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
parent e2e19160
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+4 −2
Original line number Diff line number Diff line
@@ -1800,6 +1800,8 @@ static bool cdclk_pll_is_unknown(unsigned int vco)
	return vco == ~0;
}

static const int cdclk_squash_len = 16;

static int cdclk_squash_divider(u16 waveform)
{
	return hweight16(waveform ?: 0xffff);
@@ -1811,7 +1813,6 @@ static bool cdclk_compute_crawl_and_squash_midpoint(struct drm_i915_private *i91
						    struct intel_cdclk_config *mid_cdclk_config)
{
	u16 old_waveform, new_waveform, mid_waveform;
	int size = 16;
	int div = 2;

	/* Return if PLL is in an unknown state, force a complete disable and re-enable. */
@@ -1850,7 +1851,8 @@ static bool cdclk_compute_crawl_and_squash_midpoint(struct drm_i915_private *i91
	}

	mid_cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_squash_divider(mid_waveform) *
						    mid_cdclk_config->vco, size * div);
						    mid_cdclk_config->vco,
						    cdclk_squash_len * div);

	/* make sure the mid clock came out sane */