Commit 26bb2dc1 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-xe-next-2024-10-10' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next



Cross-subsystem Changes:
- Add drm_line_printer (Michal)

Driver Changes:
- Fix an UAF (Matt Auld)
- Sanity check compression and coherency mode (Matt Auld)
- Some PIC-ID work (Jani)
- Use IS_ENABLED() instead of defined() on config options.
- gt powergating work (Riana)
- Suppress missing out ter rpm protection warning (Rodrigo)
- Fix a vm leak  (Dafna)
- Clean up and update 'has_flat_ccs' handling (Lucas)
- Fix arg to pci_iomap (Lucas)
- Mark reserved engines in shapshot (Lucas)
- Don't keep stale pointer (Michal)
- Fix build warning with CONFIG_PM=n (Arnd)
- Add a xe_bo subtest for shrinking / swapping (Thomas)
- Add a warkaround (Tejas)
- Some display PM work (Maarten)
- Enable Xe2 + PES disaggregation (Ashutosh)
- Large xe_mmio rework / cleanup (Matt Roper)
- A couple of fixes / cleanups in the xe client code (Matt Auld)
- Fix page-fault handling on closed VMs  (Matt Brost)
- Fix overflow in OA batch buffer (José)
- Style fixes (Lucas, Jiapeng, Nitin)
- Fixes and new development around SRIOV (Michal)
- Use devm_add_action_or_reset() in gt code (He)
- Fix CCS offset calculation (Matt Auld)
- Remove i915_drv.h include (Rodrigo)
- Restore PCI state on resume (Rodrigo)
- Fix DSB buffer coherency / Revert DSB disabling (Maarten / Animesh)
- Convert USM lock to rwsem (Matt Brost)
- Defer gt-mmio intialization (Matt Roper)
- meemirq changes (Ilia)
- Move some PVC related code out of xe-for-CI and to the driver (Rodrigo / Jani)
- Use a helper for ASID->VM lookup (Matt Brost)
- Add new PCI id for ARL (Dnyaneshwar)
- Use Xe2_LPM steering tables for Xe2_HPM (Gustavo)
- Performance tuning work for media GT and L3 cache flushing (Gustavo)
- Clean up VM- and exec queue file lock usage (Matt Brost)
- GuC locking fix (Matt Auld)
- Fix UAF around queue destruction (Matt Auld)
- Move IRQ-related registers to dedicated header (Matt Roper)
- Resume TDR after GT reset (Matt Brost)
- Move xa_alloc to prevent UAF (Matt Auld)
- Fix OA stream close (José)
- Remove unused i915_gpu_error.h (Jani)
- Prevent null pointer access in xe_migrate_copy (Zhanjun)
- Fix memory leak when aborting binds (Matt Brost)
- Prevent UAF in send_recv() (Matt Auld)
- Fix xa_store() error checking (Matt Auld)
- drop irq disabling around xa_erase in guc code (Matt Auld)
- Use fault injection infrastructure to find issues as probe time (Francois)
- Fix a workaround implementation. (Vinay)
- Mark wedged_mode debugfs writable (Matt Roper)
- Fix for prviewous memirq work (Michal)
- More SRIOV work (Michal)
- Devcoredump work (John)
- GuC logging + devcoredump support (John)
- Don't report L3 bank availability on PTL (Shekhar)
- Replicate Xe2 PAT settings on Xe2 (Matt Roper)
- Define Xe3 feature flags (Haridhar)
- Reuse Xe2 MOCS table on on PTL (Haridhar)
- Add PTL platform definition (Haridhar)
- Add MCR steering for Xe3 (Matt)
- More work around GuC capture for devcoredump (Zhanjun)
- Improve cache flushing behaviour on bmg (Matt Auld)
- Fix shrinker test compiler warnings on 32-bit (Thomas)
- Initial set of workarounds for Xe3 (Gustavo)
- Extend workaround for xe2lpg (Aradhya)
- Fix unbalanced rpm put x 2 (Matt Auld)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

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# gpg: Signature made Thu 10 Oct 2024 19:53:11 AEST
# gpg:                using EDDSA key 6C91433BC35A06E6BC762193B81693550AC606BF
# gpg: Can't check signature: No public key

# Conflicts:
#	drivers/gpu/drm/xe/xe_gt_mcr.c
#	drivers/gpu/drm/xe/xe_tuning.c
From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Zwekwrak12c5SSgo@fedora
parents aa628ebb a187c1b0
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+14 −0
Original line number Diff line number Diff line
@@ -235,6 +235,20 @@ void __drm_printfn_err(struct drm_printer *p, struct va_format *vaf)
}
EXPORT_SYMBOL(__drm_printfn_err);

void __drm_printfn_line(struct drm_printer *p, struct va_format *vaf)
{
	unsigned int counter = ++p->line.counter;
	const char *prefix = p->prefix ?: "";
	const char *pad = p->prefix ? " " : "";

	if (p->line.series)
		drm_printf(p->arg, "%s%s%u.%u: %pV",
			   prefix, pad, p->line.series, counter, vaf);
	else
		drm_printf(p->arg, "%s%s%u: %pV", prefix, pad, counter, vaf);
}
EXPORT_SYMBOL(__drm_printfn_line);

/**
 * drm_puts - print a const string to a &drm_printer stream
 * @p: the &drm printer
+0 −4
Original line number Diff line number Diff line
@@ -706,10 +706,6 @@ struct intel_dsb *intel_dsb_prepare(struct intel_atomic_state *state,
	if (!i915->display.params.enable_dsb)
		return NULL;

	/* TODO: DSB is broken in Xe KMD, so disabling it until fixed */
	if (!IS_ENABLED(I915))
		return NULL;

	dsb = kzalloc(sizeof(*dsb), GFP_KERNEL);
	if (!dsb)
		goto out;
+12 −0
Original line number Diff line number Diff line
@@ -40,9 +40,21 @@ config DRM_XE_DEBUG_VM

	  If in doubt, say "N".

config DRM_XE_DEBUG_MEMIRQ
	bool "Enable extra memirq debugging"
	default n
	help
	  Choose this option to enable additional debugging info for
	  memory based interrupts.

	  Recommended for driver developers only.

	  If in doubt, say "N".

config DRM_XE_DEBUG_SRIOV
	bool "Enable extra SR-IOV debugging"
	default n
	select DRM_XE_DEBUG_MEMIRQ
	help
	  Enable extra SR-IOV debugging info.

+2 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ xe-y += xe_bb.o \
	xe_gt_topology.o \
	xe_guc.o \
	xe_guc_ads.o \
	xe_guc_capture.o \
	xe_guc_ct.o \
	xe_guc_db_mgr.o \
	xe_guc_hwconfig.o \
@@ -129,6 +130,7 @@ xe-$(CONFIG_PCI_IOV) += \
	xe_gt_sriov_pf.o \
	xe_gt_sriov_pf_config.o \
	xe_gt_sriov_pf_control.o \
	xe_gt_sriov_pf_migration.o \
	xe_gt_sriov_pf_monitor.o \
	xe_gt_sriov_pf_policy.o \
	xe_gt_sriov_pf_service.o \
+8 −0
Original line number Diff line number Diff line
@@ -176,6 +176,14 @@ enum xe_guc_sleep_state_status {
#define GUC_LOG_CONTROL_VERBOSITY_MASK	(0xF << GUC_LOG_CONTROL_VERBOSITY_SHIFT)
#define GUC_LOG_CONTROL_DEFAULT_LOGGING	(1 << 8)

enum xe_guc_state_capture_event_status {
	XE_GUC_STATE_CAPTURE_EVENT_STATUS_SUCCESS = 0x0,
	XE_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE = 0x1,
};

#define XE_GUC_STATE_CAPTURE_EVENT_STATUS_MASK      0x000000FF
#define XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION_DATA_LEN 1

#define XE_GUC_TLB_INVAL_TYPE_SHIFT 0
#define XE_GUC_TLB_INVAL_MODE_SHIFT 8
/* Flush PPC or SMRO caches along with TLB invalidation request */
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