Commit 26bb7614 authored by Yixun Lan's avatar Yixun Lan Committed by Bartosz Golaszewski
Browse files

dt-bindings: gpio: spacemit: add support for K1 SoC 



The GPIO controller of K1 support basic functions as input/output,
all pins can be used as interrupt which route to one IRQ line,
trigger type can be select between rising edge, falling edge, or both.
There are four GPIO banks, each consisting of 32 pins.

Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Signed-off-by: default avatarYixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250412-03-k1-gpio-v8-1-1c6862d272ec@gentoo.org


Signed-off-by: default avatarBartosz Golaszewski <brgl@bgdev.pl>
parent 4e8a72f9

Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/gpio/spacemit,k1-gpio.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: SpacemiT K1 GPIO controller



maintainers:

  - Yixun Lan <dlan@gentoo.org>



description:

  The controller's registers are organized as sets of eight 32-bit

  registers with each set of port controlling 32 pins.  A single

  interrupt line is shared for all of the pins by the controller.



properties:

  $nodename:

    pattern: "^gpio@[0-9a-f]+$"



  compatible:

    const: spacemit,k1-gpio



  reg:

    maxItems: 1



  clocks:

    items:

      - description: GPIO Core Clock

      - description: GPIO Bus Clock



  clock-names:

    items:

      - const: core

      - const: bus



  resets:

    maxItems: 1



  gpio-controller: true



  "#gpio-cells":

    const: 3

    description:

      The first two cells are the GPIO bank index and offset inside the bank,

      the third cell should specify GPIO flag.



  gpio-ranges: true



  interrupts:

    maxItems: 1



  interrupt-controller: true



  "#interrupt-cells":

    const: 3

    description:

      The first two cells are the GPIO bank index and offset inside the bank,

      the third cell should specify interrupt flag. The controller does not

      support level interrupts, so flags of IRQ_TYPE_LEVEL_HIGH,

      IRQ_TYPE_LEVEL_LOW should not be used.

      Refer <dt-bindings/interrupt-controller/irq.h> for valid flags.



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - gpio-controller

  - "#gpio-cells"

  - interrupts

  - interrupt-controller

  - "#interrupt-cells"

  - gpio-ranges



additionalProperties: false



examples:

  - |

    gpio@d4019000 {

      compatible = "spacemit,k1-gpio";

      reg = <0xd4019000 0x800>;

      clocks =<&ccu 9>, <&ccu 61>;

      clock-names = "core", "bus";

      gpio-controller;

      #gpio-cells = <3>;

      interrupts = <58>;

      interrupt-controller;

      interrupt-parent = <&plic>;

      #interrupt-cells = <3>;

      gpio-ranges = <&pinctrl 0 0 0 32>,

                    <&pinctrl 1 0 32 32>,

                    <&pinctrl 2 0 64 32>,

                    <&pinctrl 3 0 96 32>;

    };

...