Commit 26e89dcc authored by Marc Zyngier's avatar Marc Zyngier Committed by Oliver Upton
Browse files

KVM: arm64: Add kvm_has_s1poe() helper 



Just like we have kvm_has_s1pie(), add its S1POE counterpart,
making the code slightly more readable.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20241023145345.1613824-31-maz@kernel.org


Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
parent f7575530

arch/arm64/include/asm/kvm_host.h

+3 −0
Original line number Diff line number Diff line
@@ -1525,4 +1525,7 @@ void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val); 
#define kvm_has_s1pie(k)				\

	(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1PIE, IMP))



#define kvm_has_s1poe(k)				\

	(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1POE, IMP))



#endif /* __ARM64_KVM_HOST_H__ */

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

+1 −1
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ static inline bool ctxt_has_s1poe(struct kvm_cpu_context *ctxt) 
		return false;



	vcpu = ctxt_to_vcpu(ctxt);

	return kvm_has_feat(kern_hyp_va(vcpu->kvm), ID_AA64MMFR3_EL1, S1POE, IMP);

	return kvm_has_s1poe(kern_hyp_va(vcpu->kvm));

}



static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)

arch/arm64/kvm/nested.c

+2 −2
Original line number Diff line number Diff line
@@ -1107,7 +1107,7 @@ int kvm_init_nv_sysregs(struct kvm *kvm) 
		res0 |= HFGxTR_EL2_nRCWMASK_EL1;

	if (!kvm_has_s1pie(kvm))

		res0 |= (HFGxTR_EL2_nPIRE0_EL1 | HFGxTR_EL2_nPIR_EL1);

	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1POE, IMP))

	if (!kvm_has_s1poe(kvm))

		res0 |= (HFGxTR_EL2_nPOR_EL0 | HFGxTR_EL2_nPOR_EL1);

	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S2POE, IMP))

		res0 |= HFGxTR_EL2_nS2POR_EL1;
@@ -1217,7 +1217,7 @@ int kvm_init_nv_sysregs(struct kvm *kvm) 
		res0 |= TCR2_EL2_PTTWI | TCR2_EL2_PnCH;

	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, AIE, IMP))

		res0 |= TCR2_EL2_AIE;

	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1POE, IMP))

	if (!kvm_has_s1poe(kvm))

		res0 |= TCR2_EL2_POE | TCR2_EL2_E0POE;

	if (!kvm_has_s1pie(kvm))

		res0 |= TCR2_EL2_PIE;

arch/arm64/kvm/sys_regs.c

+2 −2
Original line number Diff line number Diff line
@@ -2323,7 +2323,7 @@ static bool access_zcr_el2(struct kvm_vcpu *vcpu, 
static unsigned int s1poe_visibility(const struct kvm_vcpu *vcpu,

				     const struct sys_reg_desc *rd)

{

	if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR3_EL1, S1POE, IMP))

	if (kvm_has_s1poe(vcpu->kvm))

		return 0;



	return REG_HIDDEN;
@@ -4862,7 +4862,7 @@ void kvm_calculate_traps(struct kvm_vcpu *vcpu) 
		kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPIRE0_EL1 |

						HFGxTR_EL2_nPIR_EL1);



	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1POE, IMP))

	if (!kvm_has_s1poe(kvm))

		kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPOR_EL1 |

						HFGxTR_EL2_nPOR_EL0);