Commit 26fbcb3d authored by Sohaib Nadeem's avatar Sohaib Nadeem Committed by Alex Deucher
Browse files

drm/amd/display: Override min required DCFCLK in dml1_validate 



[WHY]:
Increasing min DCFCLK addresses underflow issues that occur when phantom
pipe is turned on for some Sub-Viewport configs

[HOW]:
dcn32_override_min_req_dcfclk is added to override DCFCLK value in
dml1_validate when subviewport is being used.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Acked-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarSohaib Nadeem <sohaib.nadeem@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9b3fec30

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c

+6 −0
Original line number Diff line number Diff line
@@ -782,3 +782,9 @@ void dcn32_update_dml_pipes_odm_policy_based_on_context(struct dc *dc, struct dc 
		pipe_cnt++;

	}

}



void dcn32_override_min_req_dcfclk(struct dc *dc, struct dc_state *context)

{

	if (dcn32_subvp_in_use(dc, context) && context->bw_ctx.bw.dcn.clk.dcfclk_khz <= MIN_SUBVP_DCFCLK_KHZ)

		context->bw_ctx.bw.dcn.clk.dcfclk_khz = MIN_SUBVP_DCFCLK_KHZ;

}

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

+1 −0
Original line number Diff line number Diff line
@@ -1771,6 +1771,7 @@ static bool dml1_validate(struct dc *dc, struct dc_state *context, bool fast_val 
	dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);



	dcn32_override_min_req_memclk(dc, context);

	dcn32_override_min_req_dcfclk(dc, context);



	BW_VAL_TRACE_END_WATERMARKS();

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

+3 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ 
#define SUBVP_ACTIVE_MARGIN_LIST_LEN 2

#define DCN3_2_MAX_SUBVP_PIXEL_RATE_MHZ 1800

#define DCN3_2_VMIN_DISPCLK_HZ 717000000

#define MIN_SUBVP_DCFCLK_KHZ 400000



#define TO_DCN32_RES_POOL(pool)\

	container_of(pool, struct dcn32_resource_pool, base)
@@ -181,6 +182,8 @@ bool dcn32_subvp_vblank_admissable(struct dc *dc, struct dc_state *context, int 


void dcn32_update_dml_pipes_odm_policy_based_on_context(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes);



void dcn32_override_min_req_dcfclk(struct dc *dc, struct dc_state *context);



/* definitions for run time init of reg offsets */



/* CLK SRC */