Commit 273361f5 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/mtl: Fix voltage_level for cdclk==480MHz 



Allow MTL to use voltage level 1 for 480MHz cdclk,
instead of the voltage level 2 that it's currently using.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-6-ville.syrjala@linux.intel.com


Reviewed-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
parent f23fe4d7

drivers/gpu/drm/i915/display/intel_cdclk.c

+1 −1
Original line number Diff line number Diff line
@@ -3516,7 +3516,7 @@ static const struct intel_cdclk_funcs mtl_cdclk_funcs = { 
	.get_cdclk = bxt_get_cdclk,

	.set_cdclk = bxt_set_cdclk,

	.modeset_calc_cdclk = bxt_modeset_calc_cdclk,

	.calc_voltage_level = tgl_calc_voltage_level,

	.calc_voltage_level = rplu_calc_voltage_level,

};



static const struct intel_cdclk_funcs rplu_cdclk_funcs = {