Commit 27833353 authored by Chukun Pan's avatar Chukun Pan Committed by Heiko Stuebner
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arm64: dts: rockchip: Add spi nodes for RK3528



There are 2 SPI controllers on the RK3528 SoC, describe it.

Signed-off-by: default avatarChukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250520100102.1226725-3-amadeus@jmu.edu.cn


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 79f2a170
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+28 −0
Original line number Diff line number Diff line
@@ -439,6 +439,34 @@ ioc_grf: syscon@ff540000 {
			reg = <0x0 0xff540000 0x0 0x40000>;
		};

		spi0: spi@ff9c0000 {
			compatible = "rockchip,rk3528-spi",
				     "rockchip,rk3066-spi";
			reg = <0x0 0xff9c0000 0x0 0x1000>;
			clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
			clock-names = "spiclk", "apb_pclk";
			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&dmac 25>, <&dmac 24>;
			dma-names = "tx", "rx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		spi1: spi@ff9d0000 {
			compatible = "rockchip,rk3528-spi",
				     "rockchip,rk3066-spi";
			reg = <0x0 0xff9d0000 0x0 0x1000>;
			clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
			clock-names = "spiclk", "apb_pclk";
			interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&dmac 31>, <&dmac 30>;
			dma-names = "tx", "rx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		uart0: serial@ff9f0000 {
			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";
			reg = <0x0 0xff9f0000 0x0 0x100>;