Commit 27b79151 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/mes: keep enforce isolation up to date



Re-send the mes message on resume to make sure the
mes state is up to date.

Fixes: 8521e3c5 ("drm/amd/amdgpu: limit single process inside MES")
Acked-by: default avatarSrinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: Shaoyun Liu <shaoyun.liu@amd.com>
Cc: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0b4119d5
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+4 −9
Original line number Diff line number Diff line
@@ -1665,24 +1665,19 @@ static ssize_t amdgpu_gfx_set_enforce_isolation(struct device *dev,
	}

	mutex_lock(&adev->enforce_isolation_mutex);

	for (i = 0; i < num_partitions; i++) {
		if (adev->enforce_isolation[i] && !partition_values[i]) {
		if (adev->enforce_isolation[i] && !partition_values[i])
			/* Going from enabled to disabled */
			amdgpu_vmid_free_reserved(adev, AMDGPU_GFXHUB(i));
			if (adev->enable_mes && adev->gfx.enable_cleaner_shader)
				amdgpu_mes_set_enforce_isolation(adev, i, false);
		} else if (!adev->enforce_isolation[i] && partition_values[i]) {
		else if (!adev->enforce_isolation[i] && partition_values[i])
			/* Going from disabled to enabled */
			amdgpu_vmid_alloc_reserved(adev, AMDGPU_GFXHUB(i));
			if (adev->enable_mes && adev->gfx.enable_cleaner_shader)
				amdgpu_mes_set_enforce_isolation(adev, i, true);
		}
		adev->enforce_isolation[i] = partition_values[i];
	}

	mutex_unlock(&adev->enforce_isolation_mutex);

	amdgpu_mes_update_enforce_isolation(adev);

	return count;
}

+19 −1
Original line number Diff line number Diff line
@@ -1681,7 +1681,8 @@ bool amdgpu_mes_suspend_resume_all_supported(struct amdgpu_device *adev)
}

/* Fix me -- node_id is used to identify the correct MES instances in the future */
int amdgpu_mes_set_enforce_isolation(struct amdgpu_device *adev, uint32_t node_id, bool enable)
static int amdgpu_mes_set_enforce_isolation(struct amdgpu_device *adev,
					    uint32_t node_id, bool enable)
{
	struct mes_misc_op_input op_input = {0};
	int r;
@@ -1703,6 +1704,23 @@ int amdgpu_mes_set_enforce_isolation(struct amdgpu_device *adev, uint32_t node_i
	return r;
}

int amdgpu_mes_update_enforce_isolation(struct amdgpu_device *adev)
{
	int i, r = 0;

	if (adev->enable_mes && adev->gfx.enable_cleaner_shader) {
		mutex_lock(&adev->enforce_isolation_mutex);
		for (i = 0; i < (adev->xcp_mgr ? adev->xcp_mgr->num_xcps : 1); i++) {
			if (adev->enforce_isolation[i])
				r |= amdgpu_mes_set_enforce_isolation(adev, i, true);
			else
				r |= amdgpu_mes_set_enforce_isolation(adev, i, false);
		}
		mutex_unlock(&adev->enforce_isolation_mutex);
	}
	return r;
}

#if defined(CONFIG_DEBUG_FS)

static int amdgpu_debugfs_mes_event_log_show(struct seq_file *m, void *unused)
+1 −1
Original line number Diff line number Diff line
@@ -534,6 +534,6 @@ static inline void amdgpu_mes_unlock(struct amdgpu_mes *mes)

bool amdgpu_mes_suspend_resume_all_supported(struct amdgpu_device *adev);

int amdgpu_mes_set_enforce_isolation(struct amdgpu_device *adev, uint32_t node_id, bool enable);
int amdgpu_mes_update_enforce_isolation(struct amdgpu_device *adev);

#endif /* __AMDGPU_MES_H__ */
+4 −0
Original line number Diff line number Diff line
@@ -1647,6 +1647,10 @@ static int mes_v11_0_hw_init(struct amdgpu_ip_block *ip_block)
		goto failure;
	}

	r = amdgpu_mes_update_enforce_isolation(adev);
	if (r)
		goto failure;

out:
	/*
	 * Disable KIQ ring usage from the driver once MES is enabled.
+4 −0
Original line number Diff line number Diff line
@@ -1762,6 +1762,10 @@ static int mes_v12_0_hw_init(struct amdgpu_ip_block *ip_block)
		goto failure;
	}

	r = amdgpu_mes_update_enforce_isolation(adev);
	if (r)
		goto failure;

out:
	/*
	 * Disable KIQ ring usage from the driver once MES is enabled.