Commit 280d542f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2021-03-05' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "More may show up but this is what I have at this stage: just a single
  nouveau regression fix, and a bunch of amdgpu fixes.

  amdgpu:
   - S0ix fix
   - Handle new NV12 SKU
   - Misc power fixes
   - Display uninitialized value fix
   - PCIE debugfs register access fix

  nouveau:
   - regression fix for gk104"

* tag 'drm-fixes-2021-03-05' of git://anongit.freedesktop.org/drm/drm:
  drm/amdgpu: fix parameter error of RREG32_PCIE() in amdgpu_regs_pcie
  drm/amd/display: fix the return of the uninitialized value in ret
  drm/amdgpu: enable BACO runpm by default on sienna cichlid and navy flounder
  drm/amd/pm: correct Arcturus mmTHM_BACO_CNTL register address
  drm/amdgpu/swsmu/vangogh: Only use RLCPowerNotify msg for disable
  drm/amdgpu/pm: make unsupported power profile messages debug
  drm/amdgpu:disable VCN for Navi12 SKU
  drm/amdgpu: Only check for S0ix if AMD_PMC is configured
  drm/nouveau/fifo/gk104-gp1xx: fix creation of sw class
parents 44195bd7 a1f10541
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+2 −1
Original line number Diff line number Diff line
@@ -903,10 +903,11 @@ void amdgpu_acpi_fini(struct amdgpu_device *adev)
 */
bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev)
{
#if defined(CONFIG_AMD_PMC)
	if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) {
		if (adev->flags & AMD_IS_APU)
			return true;
	}

#endif
	return false;
}
+2 −2
Original line number Diff line number Diff line
@@ -357,7 +357,7 @@ static ssize_t amdgpu_debugfs_regs_pcie_read(struct file *f, char __user *buf,
	while (size) {
		uint32_t value;

		value = RREG32_PCIE(*pos >> 2);
		value = RREG32_PCIE(*pos);
		r = put_user(value, (uint32_t *)buf);
		if (r) {
			pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);
@@ -424,7 +424,7 @@ static ssize_t amdgpu_debugfs_regs_pcie_write(struct file *f, const char __user
			return r;
		}

		WREG32_PCIE(*pos >> 2, value);
		WREG32_PCIE(*pos, value);

		result += 4;
		buf += 4;
+0 −2
Original line number Diff line number Diff line
@@ -173,8 +173,6 @@ int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags)
		switch (adev->asic_type) {
		case CHIP_VEGA20:
		case CHIP_ARCTURUS:
		case CHIP_SIENNA_CICHLID:
		case CHIP_NAVY_FLOUNDER:
			/* enable runpm if runpm=1 */
			if (amdgpu_runtime_pm > 0)
				adev->runpm = true;
+4 −2
Original line number Diff line number Diff line
@@ -558,7 +558,8 @@ static bool nv_is_headless_sku(struct pci_dev *pdev)
{
	if ((pdev->device == 0x731E &&
	    (pdev->revision == 0xC6 || pdev->revision == 0xC7)) ||
	    (pdev->device == 0x7340 && pdev->revision == 0xC9))
	    (pdev->device == 0x7340 && pdev->revision == 0xC9)  ||
	    (pdev->device == 0x7360 && pdev->revision == 0xC7))
		return true;
	return false;
}
@@ -634,6 +635,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
		if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT &&
		    !amdgpu_sriov_vf(adev))
			amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
		if (!nv_is_headless_sku(adev->pdev))
		        amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
		if (!amdgpu_sriov_vf(adev))
			amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block);
+1 −1
Original line number Diff line number Diff line
@@ -530,7 +530,7 @@ bool dm_helpers_dp_write_dsc_enable(
{
	uint8_t enable_dsc = enable ? 1 : 0;
	struct amdgpu_dm_connector *aconnector;
	uint8_t ret;
	uint8_t ret = 0;

	if (!stream)
		return false;
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