Commit 28bbe4ea authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'i2c-for-6.11-rc1-second-batch' of...

Merge tag 'i2c-for-6.11-rc1-second-batch' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull more i2c updates from Wolfram Sang:
 "The I2C core has two header documentation updates as the dependecies
  are in now.

  The I2C host drivers add some patches which nearly fell through the
  cracks:

   - Added descriptions in the DTS for the Qualcomm SM8650 and SM8550
     Camera Control Interface (CCI).

   - Added support for the "settle-time-us" property, which allows the
     gpio-mux device to switch from one bus to another with a
     configurable delay. The time can be set in the DTS. The latest
     change also includes file sorting.

   - Fixed slot numbering in the SMBus framework to prevent failures
     when more than 8 slots are occupied. It now enforces a a maximum of
     8 slots to be used. This ensures that the Intel PIIX4 device can
     register the SPDs correctly without failure, even if other slots
     are populated but not used"

* tag 'i2c-for-6.11-rc1-second-batch' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: header: improve kdoc for i2c_algorithm
  i2c: header: remove unneeded stuff regarding i2c_algorithm
  i2c: piix4: Register SPDs
  i2c: smbus: remove i801 assumptions from SPD probing
  i2c: mux: gpio: Add support for the 'settle-time-us' property
  i2c: mux: gpio: Re-order #include to match alphabetic order
  dt-bindings: i2c: mux-gpio: Add 'settle-time-us' property
  dt-bindings: i2c: qcom-cci: Document sm8650 compatible
  dt-bindings: i2c: qcom-cci: Document sm8550 compatible
parents d51f8f63 385ac870
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+3 −0
Original line number Diff line number Diff line
@@ -57,6 +57,9 @@ properties:
      last value used.
    $ref: /schemas/types.yaml#/definitions/uint32

  settle-time-us:
    description: Delay to wait before doing any transfer when a new bus gets selected.

allOf:
  - $ref: i2c-mux.yaml

+20 −0
Original line number Diff line number Diff line
@@ -31,6 +31,8 @@ properties:
              - qcom,sm6350-cci
              - qcom,sm8250-cci
              - qcom,sm8450-cci
              - qcom,sm8550-cci
              - qcom,sm8650-cci
          - const: qcom,msm8996-cci # CCI v2

  "#address-cells":
@@ -195,6 +197,24 @@ allOf:
            - const: cpas_ahb
            - const: cci

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,sm8550-cci
              - qcom,sm8650-cci
    then:
      properties:
        clocks:
          minItems: 3
          maxItems: 3
        clock-names:
          items:
            - const: camnoc_axi
            - const: cpas_ahb
            - const: cci

additionalProperties: false

examples:
+1 −0
Original line number Diff line number Diff line
@@ -196,6 +196,7 @@ config I2C_ISMT
config I2C_PIIX4
	tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)"
	depends on PCI && HAS_IOPORT
	select I2C_SMBUS
	help
	  If you say yes to this option, support will be included for the Intel
	  PIIX4 family of mainboard I2C interfaces.  Specifically, the following
+9 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/i2c.h>
#include <linux/i2c-smbus.h>
#include <linux/slab.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
@@ -982,6 +983,14 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
		return retval;
	}

	/*
	 * The AUX bus can not be probed as on some platforms it reports all
	 * devices present and all reads return "0".
	 * This would allow the ee1004 to be probed incorrectly.
	 */
	if (port == 0)
		i2c_register_spd(adap);

	*padap = adap;
	return 0;
}
+4 −11
Original line number Diff line number Diff line
@@ -352,18 +352,11 @@ void i2c_register_spd(struct i2c_adapter *adap)
		return;

	/*
	 * If we're a child adapter on a muxed segment, then limit slots to 8,
	 * as this is the max number of SPD EEPROMs that can be addressed per bus.
	 * The max number of SPD EEPROMs that can be addressed per bus is 8.
	 * If more slots are present either muxed or multiple busses are
	 * necessary or the additional slots are ignored.
	 */
	if (i2c_parent_is_i2c_adapter(adap)) {
		slot_count = 8;
	} else {
		if (slot_count > 8) {
			dev_warn(&adap->dev,
				 "More than 8 memory slots on a single bus, contact i801 maintainer to add missing mux config\n");
			return;
		}
	}
	slot_count = min(slot_count, 8);

	/*
	 * Memory types could be found at section 7.18.2 (Memory Device — Type), table 78
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