Commit 28e505d8 authored by Sascha Bischoff's avatar Sascha Bischoff Committed by Marc Zyngier
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KVM: arm64: Correct test for ICH_HCR_EL2_TDIR cap for GICv5 hosts 



The original order of checks in the ICH_HCR_EL2_TDIR test returned
with false early in the case where the native GICv3 CPUIF was not
present. The result was that on GICv5 hosts with legacy support -
which do not have the GICv3 CPUIF - the test always returned false.

Reshuffle the checks such that support for GICv5 legacy is checked
prior to checking for the native GICv3 CPUIF.

Signed-off-by: default avatarSascha Bischoff <sascha.bischoff@arm.com>
Fixes: 2a28810c ("KVM: arm64: GICv3: Detect and work around the lack of ICV_DIR_EL1 trapping")
Link: https://patch.msgid.link/20251208152724.3637157-4-sascha.bischoff@arm.com


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent da63758c

arch/arm64/kernel/cpufeature.c

+4 −4
Original line number Diff line number Diff line
@@ -2326,16 +2326,16 @@ static bool can_trap_icv_dir_el1(const struct arm64_cpu_capabilities *entry, 


	BUILD_BUG_ON(ARM64_HAS_ICH_HCR_EL2_TDIR <= ARM64_HAS_GICV3_CPUIF);

	BUILD_BUG_ON(ARM64_HAS_ICH_HCR_EL2_TDIR <= ARM64_HAS_GICV5_LEGACY);

	if (!this_cpu_has_cap(ARM64_HAS_GICV3_CPUIF) &&

	    !is_midr_in_range_list(has_vgic_v3))

		return false;



	if (!is_hyp_mode_available())

		return false;



	if (this_cpu_has_cap(ARM64_HAS_GICV5_LEGACY))

		return true;



	if (!this_cpu_has_cap(ARM64_HAS_GICV3_CPUIF) &&

	    !is_midr_in_range_list(has_vgic_v3))

		return false;



	if (is_kernel_in_hyp_mode())

		res.a1 = read_sysreg_s(SYS_ICH_VTR_EL2);

	else