Commit 28f0ae48 authored by Jonas Karlman's avatar Jonas Karlman Committed by Heiko Stuebner
Browse files

drm/rockchip: dw_hdmi: Enable 4K@60Hz mode on RK3399 and RK356x 



Use a maximum TMDS clock rate limit of 594MHz to enable use of HDMI2.0
modes, e.g. 4K@60Hz, on RK3399 and RK3568.

Signed-off-by: default avatarJonas Karlman <jonas@kwiboo.se>
Tested-by: Diederik de Haas <didi.debian@cknow.org> # Quartz64 Model B
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20240908145511.3331451-7-jonas@kwiboo.se
parent 7595c7ef

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

+2 −2
Original line number Diff line number Diff line
@@ -481,7 +481,7 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = { 
	.lcdsel_grf_reg = RK3399_GRF_SOC_CON20,

	.lcdsel_big = HIWORD_UPDATE(0, RK3399_HDMI_LCDC_SEL),

	.lcdsel_lit = HIWORD_UPDATE(RK3399_HDMI_LCDC_SEL, RK3399_HDMI_LCDC_SEL),

	.max_tmds_clock = 340000,

	.max_tmds_clock = 594000,

};



static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
@@ -495,7 +495,7 @@ static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = { 


static struct rockchip_hdmi_chip_data rk3568_chip_data = {

	.lcdsel_grf_reg = -1,

	.max_tmds_clock = 340000,

	.max_tmds_clock = 594000,

};



static const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = {