Unverified Commit 292284f2 authored by Mark Brown's avatar Mark Brown
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ASoC: fsl: Support MQS on i.MX943

Merge series from Shengjiu Wang <shengjiu.wang@nxp.com>:

There are two MQS instances on the i.MX943 platform.
The definition of bit positions in the control register are
different. In order to support these MQS modules, define
two compatible strings to distinguish them.
parents 8eb27b57 a1a771e5
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+2 −0
Original line number Diff line number Diff line
@@ -23,6 +23,8 @@ properties:
      - fsl,imx8qm-mqs
      - fsl,imx8qxp-mqs
      - fsl,imx93-mqs
      - fsl,imx943-aonmix-mqs
      - fsl,imx943-wakeupmix-mqs
      - fsl,imx95-aonmix-mqs
      - fsl,imx95-netcmix-mqs

+28 −0
Original line number Diff line number Diff line
@@ -410,12 +410,40 @@ static const struct fsl_mqs_soc_data fsl_mqs_imx95_netc_data = {
	.div_shift = 9,
};

static const struct fsl_mqs_soc_data fsl_mqs_imx943_aon_data = {
	.type = TYPE_REG_SM,
	.ctrl_off = 0x88,
	.en_mask  = BIT(1),
	.en_shift = 1,
	.rst_mask = BIT(2),
	.rst_shift = 2,
	.osr_mask = BIT(3),
	.osr_shift = 3,
	.div_mask = GENMASK(15, 8),
	.div_shift = 8,
};

static const struct fsl_mqs_soc_data fsl_mqs_imx943_wakeup_data = {
	.type = TYPE_REG_GPR,
	.ctrl_off = 0x10,
	.en_mask  = BIT(1),
	.en_shift = 1,
	.rst_mask = BIT(2),
	.rst_shift = 2,
	.osr_mask = BIT(3),
	.osr_shift = 3,
	.div_mask = GENMASK(15, 8),
	.div_shift = 8,
};

static const struct of_device_id fsl_mqs_dt_ids[] = {
	{ .compatible = "fsl,imx8qm-mqs", .data = &fsl_mqs_imx8qm_data },
	{ .compatible = "fsl,imx6sx-mqs", .data = &fsl_mqs_imx6sx_data },
	{ .compatible = "fsl,imx93-mqs", .data = &fsl_mqs_imx93_data },
	{ .compatible = "fsl,imx95-aonmix-mqs", .data = &fsl_mqs_imx95_aon_data },
	{ .compatible = "fsl,imx95-netcmix-mqs", .data = &fsl_mqs_imx95_netc_data },
	{ .compatible = "fsl,imx943-aonmix-mqs", .data = &fsl_mqs_imx943_aon_data },
	{ .compatible = "fsl,imx943-wakeupmix-mqs", .data = &fsl_mqs_imx943_wakeup_data },
	{}
};
MODULE_DEVICE_TABLE(of, fsl_mqs_dt_ids);