Unverified Commit 2960f371 authored by Sunil V L's avatar Sunil V L Committed by Palmer Dabbelt
Browse files

RISC-V: cacheflush: Initialize CBO variables on ACPI systems 



Initialize the CBO variables on ACPI based systems using information in
RHCT.

Signed-off-by: default avatarSunil V L <sunilvl@ventanamicro.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarSamuel Holland <samuel.holland@sifive.com>
Link: https://lore.kernel.org/r/20231018124007.1306159-5-sunilvl@ventanamicro.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 9ca87564

arch/riscv/mm/cacheflush.c

+19 −6
Original line number Diff line number Diff line
@@ -3,7 +3,9 @@ 
 * Copyright (C) 2017 SiFive

 */



#include <linux/acpi.h>

#include <linux/of.h>

#include <asm/acpi.h>

#include <asm/cacheflush.h>



#ifdef CONFIG_SMP
@@ -124,7 +126,10 @@ void __init riscv_init_cbo_blocksizes(void) 
	unsigned long cbom_hartid, cboz_hartid;

	u32 cbom_block_size = 0, cboz_block_size = 0;

	struct device_node *node;

	struct acpi_table_header *rhct;

	acpi_status status;



	if (acpi_disabled) {

		for_each_of_cpu_node(node) {

			/* set block-size for cbom and/or cboz extension if available */

			cbo_get_block_size(node, "riscv,cbom-block-size",
@@ -132,6 +137,14 @@ void __init riscv_init_cbo_blocksizes(void) 
			cbo_get_block_size(node, "riscv,cboz-block-size",

					   &cboz_block_size, &cboz_hartid);

		}

	} else {

		status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);

		if (ACPI_FAILURE(status))

			return;



		acpi_get_cbo_block_size(rhct, &cbom_block_size, &cboz_block_size, NULL);

		acpi_put_table((struct acpi_table_header *)rhct);

	}



	if (cbom_block_size)

		riscv_cbom_block_size = cbom_block_size;