Unverified Commit 299ce4be authored by Charles Keepax's avatar Charles Keepax Committed by Mark Brown
Browse files

ASoC: rt722-sdca: Make use of new expanded MBQ regmap



Now the MBQ regmap implementation handles multiple sizes, this driver
can combine its two register maps into one. So remove mbq_regmap and
combine all the registers into regmap.

Also as rt722_sdca_adc_mux_get/put() only exist to access mbq_regmap,
rather than doing any processing, these can now be dropped and the
normal DAPM helpers used.

Signed-off-by: default avatarCharles Keepax <ckeepax@opensource.cirrus.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.dev>
Link: https://patch.msgid.link/20250107154408.814455-7-ckeepax@opensource.cirrus.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent f9a5c4b6
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+26 −55
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@
#include "rt722-sdca.h"
#include "rt722-sdca-sdw.h"

static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg)
static int rt722_sdca_mbq_size(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case 0x2f01 ... 0x2f0a:
@@ -73,32 +73,7 @@ static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg)
	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31,
			  RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
	case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
		return true;
	default:
		return false;
	}
}

static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case 0x2f01:
	case 0x2f54:
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
			0):
	case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
			0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
			RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
	case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
		return true;
	default:
		return false;
	}
}

static bool rt722_sdca_mbq_readable_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
		return 1;
	case 0x2000000 ... 0x2000024:
	case 0x2000029 ... 0x200004a:
	case 0x2000051 ... 0x2000052:
@@ -151,15 +126,32 @@ static bool rt722_sdca_mbq_readable_register(struct device *dev, unsigned int re
			RT722_SDCA_CTL_FU_CH_GAIN, CH_L):
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
			RT722_SDCA_CTL_FU_CH_GAIN, CH_R):
		return true;
		return 2;
	default:
		return false;
		return 0;
	}
}

static bool rt722_sdca_mbq_volatile_register(struct device *dev, unsigned int reg)
static struct regmap_sdw_mbq_cfg rt722_mbq_config = {
	.mbq_size = rt722_sdca_mbq_size,
};

static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg)
{
	return rt722_sdca_mbq_size(dev, reg) > 0;
}

static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case 0x2f01:
	case 0x2f54:
	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
			0):
	case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
			0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
			RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
	case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
	case 0x2000000:
	case 0x200000d:
	case 0x2000019:
@@ -178,7 +170,7 @@ static bool rt722_sdca_mbq_volatile_register(struct device *dev, unsigned int re

static const struct regmap_config rt722_sdca_regmap = {
	.reg_bits = 32,
	.val_bits = 8,
	.val_bits = 16,
	.readable_reg = rt722_sdca_readable_register,
	.volatile_reg = rt722_sdca_volatile_register,
	.max_register = 0x44ffffff,
@@ -189,20 +181,6 @@ static const struct regmap_config rt722_sdca_regmap = {
	.use_single_write = true,
};

static const struct regmap_config rt722_sdca_mbq_regmap = {
	.name = "sdw-mbq",
	.reg_bits = 32,
	.val_bits = 16,
	.readable_reg = rt722_sdca_mbq_readable_register,
	.volatile_reg = rt722_sdca_mbq_volatile_register,
	.max_register = 0x41000312,
	.reg_defaults = rt722_sdca_mbq_defaults,
	.num_reg_defaults = ARRAY_SIZE(rt722_sdca_mbq_defaults),
	.cache_type = REGCACHE_MAPLE,
	.use_single_read = true,
	.use_single_write = true,
};

static int rt722_sdca_update_status(struct sdw_slave *slave,
				enum sdw_slave_status status)
{
@@ -412,18 +390,14 @@ static const struct sdw_slave_ops rt722_sdca_slave_ops = {
static int rt722_sdca_sdw_probe(struct sdw_slave *slave,
				const struct sdw_device_id *id)
{
	struct regmap *regmap, *mbq_regmap;
	struct regmap *regmap;

	/* Regmap Initialization */
	mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt722_sdca_mbq_regmap);
	if (IS_ERR(mbq_regmap))
		return PTR_ERR(mbq_regmap);

	regmap = devm_regmap_init_sdw(slave, &rt722_sdca_regmap);
	regmap = devm_regmap_init_sdw_mbq_cfg(slave, &rt722_sdca_regmap, &rt722_mbq_config);
	if (IS_ERR(regmap))
		return PTR_ERR(regmap);

	return rt722_sdca_init(&slave->dev, regmap, mbq_regmap, slave);
	return rt722_sdca_init(&slave->dev, regmap, slave);
}

static int rt722_sdca_sdw_remove(struct sdw_slave *slave)
@@ -461,7 +435,6 @@ static int __maybe_unused rt722_sdca_dev_suspend(struct device *dev)
	cancel_delayed_work_sync(&rt722->jack_btn_check_work);

	regcache_cache_only(rt722->regmap, true);
	regcache_cache_only(rt722->mbq_regmap, true);

	return 0;
}
@@ -531,8 +504,6 @@ static int __maybe_unused rt722_sdca_dev_resume(struct device *dev)
	slave->unattach_request = 0;
	regcache_cache_only(rt722->regmap, false);
	regcache_sync(rt722->regmap);
	regcache_cache_only(rt722->mbq_regmap, false);
	regcache_sync(rt722->mbq_regmap);
	return 0;
}

+48 −51
Original line number Diff line number Diff line
@@ -31,50 +31,9 @@ static const struct reg_default rt722_sdca_reg_defaults[] = {
	{ 0x2f5b, 0x07 },
	{ 0x2f5c, 0x27 },
	{ 0x2f5d, 0x07 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
		0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
		0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, RT722_SDCA_CTL_REQ_POWER_STATE,
		0), 0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, RT722_SDCA_CTL_REQ_POWER_STATE,
		0), 0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_MUTE, CH_L),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_MUTE, CH_R),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_MUTE, CH_L),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_MUTE, CH_R),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
		0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_01),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_02),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_03),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_04),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
		0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26, RT722_SDCA_CTL_VENDOR_DEF, 0),
		0x00 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
		0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_MUTE, CH_L),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_MUTE, CH_R),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
		0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23, RT722_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
};

static const struct reg_default rt722_sdca_mbq_defaults[] = {
	{ 0x200003c, 0xc214 },
	{ 0x2000046, 0x8004 },
	{ 0x5810000, 0x702d },
	{ 0x6100006, 0x0005 },
	{ 0x6100010, 0x2630 },
	{ 0x6100011, 0x152f },
@@ -86,27 +45,34 @@ static const struct reg_default rt722_sdca_mbq_defaults[] = {
	{ 0x6100028, 0x2a2a },
	{ 0x6100029, 0x4141 },
	{ 0x6100055, 0x0000 },
	{ 0x5810000, 0x702d },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_MUTE, CH_L),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_MUTE, CH_R),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
		CH_L), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
		CH_R), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_MUTE, CH_L),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_MUTE, CH_R),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
		CH_L), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
		CH_R), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, RT722_SDCA_CTL_REQ_POWER_STATE,
		0), 0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
		0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
		0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, RT722_SDCA_CTL_REQ_POWER_STATE,
		0), 0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, RT722_SDCA_CTL_FU_CH_GAIN,
		CH_L), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, RT722_SDCA_CTL_FU_CH_GAIN,
		CH_R), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
		CH_01), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
		CH_02), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
		CH_03), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
		CH_04), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, CH_01),
		0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, CH_02),
@@ -115,10 +81,41 @@ static const struct reg_default rt722_sdca_mbq_defaults[] = {
		0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, CH_04),
		0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_01),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_02),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_03),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_04),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
		CH_01), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
		CH_02), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
		CH_03), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
		CH_04), 0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
		0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
		0), 0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26, RT722_SDCA_CTL_VENDOR_DEF, 0),
		0x00 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_MUTE, CH_L),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_MUTE, CH_R),
		0x01 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L),
		0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R),
		0x0000 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
		0x03 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
		0x09 },
	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23, RT722_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
};

#endif /* __RT722_SDW_H__ */
+30 −105
Original line number Diff line number Diff line
@@ -25,11 +25,13 @@

#include "rt722-sdca.h"

#define RT722_NID_ADDR(nid, reg) ((nid) << 20 | (reg))

int rt722_sdca_index_write(struct rt722_sdca_priv *rt722,
		unsigned int nid, unsigned int reg, unsigned int value)
{
	struct regmap *regmap = rt722->mbq_regmap;
	unsigned int addr = (nid << 20) | reg;
	struct regmap *regmap = rt722->regmap;
	unsigned int addr = RT722_NID_ADDR(nid, reg);
	int ret;

	ret = regmap_write(regmap, addr, value);
@@ -45,8 +47,8 @@ int rt722_sdca_index_read(struct rt722_sdca_priv *rt722,
		unsigned int nid, unsigned int reg, unsigned int *value)
{
	int ret;
	struct regmap *regmap = rt722->mbq_regmap;
	unsigned int addr = (nid << 20) | reg;
	struct regmap *regmap = rt722->regmap;
	unsigned int addr = RT722_NID_ADDR(nid, reg);

	ret = regmap_read(regmap, addr, value);
	if (ret < 0)
@@ -361,8 +363,8 @@ static int rt722_sdca_set_gain_put(struct snd_kcontrol *kcontrol,
		strstr(ucontrol->id.name, "FU0F Capture Volume"))
		adc_vol_flag = 1;

	regmap_read(rt722->mbq_regmap, mc->reg, &lvalue);
	regmap_read(rt722->mbq_regmap, mc->rreg, &rvalue);
	regmap_read(rt722->regmap, mc->reg, &lvalue);
	regmap_read(rt722->regmap, mc->rreg, &rvalue);

	/* L Channel */
	gain_l_val = ucontrol->value.integer.value[0];
@@ -402,13 +404,13 @@ static int rt722_sdca_set_gain_put(struct snd_kcontrol *kcontrol,
		return 0;

	/* Lch*/
	regmap_write(rt722->mbq_regmap, mc->reg, gain_l_val);
	regmap_write(rt722->regmap, mc->reg, gain_l_val);

	/* Rch */
	regmap_write(rt722->mbq_regmap, mc->rreg, gain_r_val);
	regmap_write(rt722->regmap, mc->rreg, gain_r_val);

	regmap_read(rt722->mbq_regmap, mc->reg, &read_l);
	regmap_read(rt722->mbq_regmap, mc->rreg, &read_r);
	regmap_read(rt722->regmap, mc->reg, &read_l);
	regmap_read(rt722->regmap, mc->rreg, &read_r);
	if (read_r == gain_r_val && read_l == gain_l_val)
		return changed;

@@ -431,8 +433,8 @@ static int rt722_sdca_set_gain_get(struct snd_kcontrol *kcontrol,
		strstr(ucontrol->id.name, "FU0F Capture Volume"))
		adc_vol_flag = 1;

	regmap_read(rt722->mbq_regmap, mc->reg, &read_l);
	regmap_read(rt722->mbq_regmap, mc->rreg, &read_r);
	regmap_read(rt722->regmap, mc->reg, &read_l);
	regmap_read(rt722->regmap, mc->rreg, &read_r);

	if (mc->shift == 8) /* boost gain */
		ctl_l = read_l / tendB;
@@ -604,7 +606,7 @@ static int rt722_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,

	/* check all channels */
	for (i = 0; i < p->count; i++) {
		regmap_read(rt722->mbq_regmap, p->reg_base + i, &regvalue);
		regmap_read(rt722->regmap, p->reg_base + i, &regvalue);

		if (!adc_vol_flag) /* boost gain */
			ctl = regvalue / boost_step;
@@ -637,7 +639,7 @@ static int rt722_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,

	/* check all channels */
	for (i = 0; i < p->count; i++) {
		regmap_read(rt722->mbq_regmap, p->reg_base + i, &regvalue[i]);
		regmap_read(rt722->regmap, p->reg_base + i, &regvalue[i]);

		gain_val[i] = ucontrol->value.integer.value[i];
		if (gain_val[i] > p->max)
@@ -658,7 +660,7 @@ static int rt722_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
		return 0;

	for (i = 0; i < p->count; i++) {
		err = regmap_write(rt722->mbq_regmap, p->reg_base + i, gain_val[i]);
		err = regmap_write(rt722->regmap, p->reg_base + i, gain_val[i]);
		if (err < 0)
			dev_err(&rt722->slave->dev, "%s: %#08x can't be set\n",
				__func__, p->reg_base + i);
@@ -739,77 +741,6 @@ static const struct snd_kcontrol_new rt722_sdca_controls[] = {
			4, 3, boost_vol_tlv),
};

static int rt722_sdca_adc_mux_get(struct snd_kcontrol *kcontrol,
			struct snd_ctl_elem_value *ucontrol)
{
	struct snd_soc_component *component =
		snd_soc_dapm_kcontrol_component(kcontrol);
	struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
	unsigned int val = 0, mask_sft;

	if (strstr(ucontrol->id.name, "ADC 22 Mux"))
		mask_sft = 12;
	else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
		mask_sft = 4;
	else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
		mask_sft = 0;
	else
		return -EINVAL;

	rt722_sdca_index_read(rt722, RT722_VENDOR_HDA_CTL,
		RT722_HDA_LEGACY_MUX_CTL0, &val);

	ucontrol->value.enumerated.item[0] = (val >> mask_sft) & 0x7;

	return 0;
}

static int rt722_sdca_adc_mux_put(struct snd_kcontrol *kcontrol,
			struct snd_ctl_elem_value *ucontrol)
{
	struct snd_soc_component *component =
		snd_soc_dapm_kcontrol_component(kcontrol);
	struct snd_soc_dapm_context *dapm =
		snd_soc_dapm_kcontrol_dapm(kcontrol);
	struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
	unsigned int *item = ucontrol->value.enumerated.item;
	unsigned int val, val2 = 0, change, mask_sft;

	if (item[0] >= e->items)
		return -EINVAL;

	if (strstr(ucontrol->id.name, "ADC 22 Mux"))
		mask_sft = 12;
	else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
		mask_sft = 4;
	else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
		mask_sft = 0;
	else
		return -EINVAL;

	val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;

	rt722_sdca_index_read(rt722, RT722_VENDOR_HDA_CTL,
		RT722_HDA_LEGACY_MUX_CTL0, &val2);
	val2 = (0x7 << mask_sft) & val2;

	if (val == val2)
		change = 0;
	else
		change = 1;

	if (change)
		rt722_sdca_index_update_bits(rt722, RT722_VENDOR_HDA_CTL,
			RT722_HDA_LEGACY_MUX_CTL0, 0x7 << mask_sft,
			val << mask_sft);

	snd_soc_dapm_mux_update_power(dapm, kcontrol,
		item[0], e, NULL);

	return change;
}

static const char * const adc22_mux_text[] = {
	"MIC2",
	"LINE1",
@@ -821,26 +752,26 @@ static const char * const adc07_10_mux_text[] = {
	"DMIC2",
};

static SOC_ENUM_SINGLE_DECL(
	rt722_adc22_enum, SND_SOC_NOPM, 0, adc22_mux_text);
static SOC_ENUM_SINGLE_DECL(rt722_adc22_enum,
			    RT722_NID_ADDR(RT722_VENDOR_HDA_CTL, RT722_HDA_LEGACY_MUX_CTL0),
			    12, adc22_mux_text);

static SOC_ENUM_SINGLE_DECL(
	rt722_adc24_enum, SND_SOC_NOPM, 0, adc07_10_mux_text);
static SOC_ENUM_SINGLE_DECL(rt722_adc24_enum,
			    RT722_NID_ADDR(RT722_VENDOR_HDA_CTL, RT722_HDA_LEGACY_MUX_CTL0),
			    4, adc07_10_mux_text);

static SOC_ENUM_SINGLE_DECL(
	rt722_adc25_enum, SND_SOC_NOPM, 0, adc07_10_mux_text);
static SOC_ENUM_SINGLE_DECL(rt722_adc25_enum,
			    RT722_NID_ADDR(RT722_VENDOR_HDA_CTL, RT722_HDA_LEGACY_MUX_CTL0),
			    0, adc07_10_mux_text);

static const struct snd_kcontrol_new rt722_sdca_adc22_mux =
	SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt722_adc22_enum,
			rt722_sdca_adc_mux_get, rt722_sdca_adc_mux_put);
	SOC_DAPM_ENUM("ADC 22 Mux", rt722_adc22_enum);

static const struct snd_kcontrol_new rt722_sdca_adc24_mux =
	SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt722_adc24_enum,
			rt722_sdca_adc_mux_get, rt722_sdca_adc_mux_put);
	SOC_DAPM_ENUM("ADC 24 Mux", rt722_adc24_enum);

static const struct snd_kcontrol_new rt722_sdca_adc25_mux =
	SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt722_adc25_enum,
			rt722_sdca_adc_mux_get, rt722_sdca_adc_mux_put);
	SOC_DAPM_ENUM("ADC 25 Mux", rt722_adc25_enum);

static int rt722_sdca_fu42_event(struct snd_soc_dapm_widget *w,
	struct snd_kcontrol *kcontrol, int event)
@@ -1335,8 +1266,7 @@ static struct snd_soc_dai_driver rt722_sdca_dai[] = {
	}
};

int rt722_sdca_init(struct device *dev, struct regmap *regmap,
			struct regmap *mbq_regmap, struct sdw_slave *slave)
int rt722_sdca_init(struct device *dev, struct regmap *regmap, struct sdw_slave *slave)
{
	struct rt722_sdca_priv *rt722;

@@ -1347,7 +1277,6 @@ int rt722_sdca_init(struct device *dev, struct regmap *regmap,
	dev_set_drvdata(dev, rt722);
	rt722->slave = slave;
	rt722->regmap = regmap;
	rt722->mbq_regmap = mbq_regmap;

	mutex_init(&rt722->calibrate_mutex);
	mutex_init(&rt722->disable_irq_lock);
@@ -1521,8 +1450,6 @@ int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave)
	if (rt722->first_hw_init) {
		regcache_cache_only(rt722->regmap, false);
		regcache_cache_bypass(rt722->regmap, true);
		regcache_cache_only(rt722->mbq_regmap, false);
		regcache_cache_bypass(rt722->mbq_regmap, true);
	} else {
		/*
		 * PM runtime is only enabled when a Slave reports as Attached
@@ -1550,8 +1477,6 @@ int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave)
	if (rt722->first_hw_init) {
		regcache_cache_bypass(rt722->regmap, false);
		regcache_mark_dirty(rt722->regmap);
		regcache_cache_bypass(rt722->mbq_regmap, false);
		regcache_mark_dirty(rt722->mbq_regmap);
	} else
		rt722->first_hw_init = true;

+1 −3
Original line number Diff line number Diff line
@@ -17,7 +17,6 @@

struct  rt722_sdca_priv {
	struct regmap *regmap;
	struct regmap *mbq_regmap;
	struct snd_soc_component *component;
	struct sdw_slave *slave;
	struct sdw_bus_params params;
@@ -229,8 +228,7 @@ enum rt722_sdca_jd_src {
};

int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave);
int rt722_sdca_init(struct device *dev, struct regmap *regmap,
			struct regmap *mbq_regmap, struct sdw_slave *slave);
int rt722_sdca_init(struct device *dev, struct regmap *regmap, struct sdw_slave *slave);
int rt722_sdca_index_write(struct rt722_sdca_priv *rt722,
		unsigned int nid, unsigned int reg, unsigned int value);
int rt722_sdca_index_read(struct rt722_sdca_priv *rt722,