Commit 2a4067c8 authored by Shin Son's avatar Shin Son Committed by Krzysztof Kozlowski
Browse files

arm64: dts: exynosautov920: add cpucl0 clock DT nodes 



Add cmu_cpucl0 clocks for switch, cluster, and dbg domains respectively.

Signed-off-by: default avatarShin Son <shin.son@samsung.com>
Link: https://lore.kernel.org/r/20250423044153.1288077-4-shin.son@samsung.com


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 1a6ee48d

arch/arm64/boot/dts/exynos/exynosautov920.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -1075,6 +1075,21 @@ pinctrl_aud: pinctrl@1a460000 { 
			compatible = "samsung,exynosautov920-pinctrl";

			reg = <0x1a460000 0x10000>;

		};



		cmu_cpucl0: clock-controller@1ec00000 {

			compatible = "samsung,exynosautov920-cmu-cpucl0";

			reg = <0x1ec00000 0x8000>;

			#clock-cells = <1>;



			clocks = <&xtcxo>,

				 <&cmu_top DOUT_CLKCMU_CPUCL0_SWITCH>,

				 <&cmu_top DOUT_CLKCMU_CPUCL0_CLUSTER>,

				 <&cmu_top DOUT_CLKCMU_CPUCL0_DBG>;

			clock-names = "oscclk",

				      "switch",

				      "cluster",

				      "dbg";

		};

	};



	timer {