Commit 2b0229f6 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by David S. Miller
Browse files

net: dsa: mt7530: Add EN7581 support 



Introduce support for the DSA built-in switch available on the EN7581
development board. EN7581 support is similar to MT7988 one except
it requires to set MT7530_FORCE_MODE bit in MT753X_PMCR_P register
for on cpu port.

Tested-by: default avatarBenjamin Larsson <benjamin.larsson@genexis.eu>
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Reviewed-by: default avatarArınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: default avatarFlorian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 101a002a

drivers/net/dsa/mt7530-mmio.c

+1 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include "mt7530.h"



static const struct of_device_id mt7988_of_match[] = {

	{ .compatible = "airoha,en7581-switch", .data = &mt753x_table[ID_EN7581], },

	{ .compatible = "mediatek,mt7988-switch", .data = &mt753x_table[ID_MT7988], },

	{ /* sentinel */ },

};

drivers/net/dsa/mt7530.c

+43 −6
Original line number Diff line number Diff line
@@ -1152,7 +1152,8 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port) 
	 * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that

	 * is affine to the inbound user port.

	 */

	if (priv->id == ID_MT7531 || priv->id == ID_MT7988)

	if (priv->id == ID_MT7531 || priv->id == ID_MT7988 ||

	    priv->id == ID_EN7581)

		mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));



	/* CPU port gets connected to all user ports of
@@ -2207,7 +2208,7 @@ mt7530_setup_irq(struct mt7530_priv *priv) 
		return priv->irq ? : -EINVAL;

	}



	if (priv->id == ID_MT7988)

	if (priv->id == ID_MT7988 || priv->id == ID_EN7581)

		priv->irq_domain = irq_domain_add_linear(np, MT7530_NUM_PHYS,

							 &mt7988_irq_domain_ops,

							 priv);
@@ -2438,8 +2439,10 @@ mt7530_setup(struct dsa_switch *ds) 
		/* Clear link settings and enable force mode to force link down

		 * on all ports until they're enabled later.

		 */

		mt7530_rmw(priv, MT753X_PMCR_P(i), PMCR_LINK_SETTINGS_MASK |

			   MT7530_FORCE_MODE, MT7530_FORCE_MODE);

		mt7530_rmw(priv, MT753X_PMCR_P(i),

			   PMCR_LINK_SETTINGS_MASK |

			   MT753X_FORCE_MODE(priv->id),

			   MT753X_FORCE_MODE(priv->id));



		/* Disable forwarding by default on all ports */

		mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
@@ -2550,8 +2553,10 @@ mt7531_setup_common(struct dsa_switch *ds) 
		/* Clear link settings and enable force mode to force link down

		 * on all ports until they're enabled later.

		 */

		mt7530_rmw(priv, MT753X_PMCR_P(i), PMCR_LINK_SETTINGS_MASK |

			   MT7531_FORCE_MODE_MASK, MT7531_FORCE_MODE_MASK);

		mt7530_rmw(priv, MT753X_PMCR_P(i),

			   PMCR_LINK_SETTINGS_MASK |

			   MT753X_FORCE_MODE(priv->id),

			   MT753X_FORCE_MODE(priv->id));



		/* Disable forwarding by default on all ports */

		mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
@@ -2783,6 +2788,28 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, 
	}

}



static void en7581_mac_port_get_caps(struct dsa_switch *ds, int port,

				     struct phylink_config *config)

{

	switch (port) {

	/* Ports which are connected to switch PHYs. There is no MII pinout. */

	case 0 ... 4:

		__set_bit(PHY_INTERFACE_MODE_INTERNAL,

			  config->supported_interfaces);



		config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;

		break;



	/* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */

	case 6:

		__set_bit(PHY_INTERFACE_MODE_INTERNAL,

			  config->supported_interfaces);



		config->mac_capabilities |= MAC_10000FD;

		break;

	}

}



static void

mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,

		  phy_interface_t interface)
@@ -3220,6 +3247,16 @@ const struct mt753x_info mt753x_table[] = { 
		.phy_write_c45 = mt7531_ind_c45_phy_write,

		.mac_port_get_caps = mt7988_mac_port_get_caps,

	},

	[ID_EN7581] = {

		.id = ID_EN7581,

		.pcs_ops = &mt7530_pcs_ops,

		.sw_setup = mt7988_setup,

		.phy_read_c22 = mt7531_ind_c22_phy_read,

		.phy_write_c22 = mt7531_ind_c22_phy_write,

		.phy_read_c45 = mt7531_ind_c45_phy_read,

		.phy_write_c45 = mt7531_ind_c45_phy_write,

		.mac_port_get_caps = en7581_mac_port_get_caps,

	},

};

EXPORT_SYMBOL_GPL(mt753x_table);

drivers/net/dsa/mt7530.h

+15 −5
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ enum mt753x_id { 
	ID_MT7621 = 1,

	ID_MT7531 = 2,

	ID_MT7988 = 3,

	ID_EN7581 = 4,

};



#define	NUM_TRGMII_CTRL			5
@@ -64,25 +65,30 @@ enum mt753x_id { 
#define  MT7531_CPU_PMAP(x)		FIELD_PREP(MT7531_CPU_PMAP_MASK, x)



#define MT753X_MIRROR_REG(id)		((id == ID_MT7531 || \

					  id == ID_MT7988) ? \

					  id == ID_MT7988 || \

					  id == ID_EN7581) ? \

					 MT7531_CFC : MT753X_MFC)



#define MT753X_MIRROR_EN(id)		((id == ID_MT7531 || \

					  id == ID_MT7988) ? \

					  id == ID_MT7988 || \

					  id == ID_EN7581) ? \

					 MT7531_MIRROR_EN : MT7530_MIRROR_EN)



#define MT753X_MIRROR_PORT_MASK(id)	((id == ID_MT7531 || \

					  id == ID_MT7988) ? \

					  id == ID_MT7988 || \

					  id == ID_EN7581) ? \

					 MT7531_MIRROR_PORT_MASK : \

					 MT7530_MIRROR_PORT_MASK)



#define MT753X_MIRROR_PORT_GET(id, val)	((id == ID_MT7531 || \

					  id == ID_MT7988) ? \

					  id == ID_MT7988 || \

					  id == ID_EN7581) ? \

					 MT7531_MIRROR_PORT_GET(val) : \

					 MT7530_MIRROR_PORT_GET(val))



#define MT753X_MIRROR_PORT_SET(id, val)	((id == ID_MT7531 || \

					  id == ID_MT7988) ? \

					  id == ID_MT7988 || \

					  id == ID_EN7581) ? \

					 MT7531_MIRROR_PORT_SET(val) : \

					 MT7530_MIRROR_PORT_SET(val))
@@ -355,6 +361,10 @@ enum mt7530_vlan_port_acc_frm { 
					 MT7531_FORCE_MODE_TX_FC | \

					 MT7531_FORCE_MODE_EEE100 | \

					 MT7531_FORCE_MODE_EEE1G)

#define  MT753X_FORCE_MODE(id)		((id == ID_MT7531 || \

					  id == ID_MT7988) ? \

					 MT7531_FORCE_MODE_MASK : \

					 MT7530_FORCE_MODE)

#define  PMCR_LINK_SETTINGS_MASK	(PMCR_MAC_TX_EN | PMCR_MAC_RX_EN | \

					 PMCR_FORCE_EEE1G | \

					 PMCR_FORCE_EEE100 | \