Commit 2b398c05 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'asm-generic-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic 

Pull asm-generic header updates from Arnd Bergmann:
 "A series from Thomas Weißschuh cleans up the UAPI header files to no
  longer contain any references to Kconfig symbols, as these make no
  sense in userspace.

  The build-time check for these was originally added by Sam Ravnborg in
  linux-2.6.28, and a later version started warning for all newly added
  CONFIG_* checks here but kept a list of known exceptions. With the
  last exceptions gone from that list, the warning is now unconditional
  in 'make headers_install'.

  John Garry contributed a cleanup of cpumask_of_node()"

* tag 'asm-generic-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
  scripts: headers_install.sh: Remove config leak ignore machinery
  x86/uapi: Stop leaking kconfig references to userspace
  nios2: uapi: Remove custom asm/swab.h from UAPI
  ARM: uapi: Drop PSR_ENDSTATE
  ARC: Always use SWAPE instructions for __arch_swab32()
  include/asm-generic/topology.h: Remove unused definition of cpumask_of_node()
parents 1ca28333 adbbd971

arch/arc/Kconfig

+0 −5
Original line number Diff line number Diff line
@@ -121,7 +121,6 @@ choice 
config ARC_CPU_770

	bool "ARC770"

	depends on ISA_ARCOMPACT

	select ARC_HAS_SWAPE

	help

	  Support for ARC770 core introduced with Rel 4.10 (Summer 2011)

	  This core has a bunch of cool new features:
@@ -340,10 +339,6 @@ config ARC_HAS_LLSC 
	default y

	depends on !ARC_CANT_LLSC



config ARC_HAS_SWAPE

	bool "Insn: SWAPE (endian-swap)"

	default y



if ISA_ARCV2



config ARC_USE_UNALIGNED_MEM_ACCESS

arch/arc/Makefile

+1 −2
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ ifeq ($(CROSS_COMPILE),) 
CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux- arc-linux-gnu-)

endif



cflags-y	+= -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__

cflags-y	+= -fno-common -pipe -fno-builtin -mmedium-calls -mswape -D__linux__



tune-mcpu-def-$(CONFIG_ISA_ARCOMPACT)	:= -mcpu=arc700

tune-mcpu-def-$(CONFIG_ISA_ARCV2)	:= -mcpu=hs38
@@ -41,7 +41,6 @@ endif 
cflags-y				+= -fsection-anchors



cflags-$(CONFIG_ARC_HAS_LLSC)		+= -mlock

cflags-$(CONFIG_ARC_HAS_SWAPE)		+= -mswape



ifdef CONFIG_ISA_ARCV2

arch/arc/include/uapi/asm/swab.h

+0 −63
Original line number Diff line number Diff line
@@ -19,9 +19,6 @@ 


#include <linux/types.h>



/* Native single cycle endian swap insn */

#ifdef CONFIG_ARC_HAS_SWAPE



#define __arch_swab32(x)		\

({					\

	unsigned int tmp = x;		\
@@ -32,66 +29,6 @@ 
	tmp;				\

})



#else



/* Several ways of Endian-Swap Emulation for ARC

 * 0: kernel generic

 * 1: ARC optimised "C"

 * 2: ARC Custom instruction

 */

#define ARC_BSWAP_TYPE	1



#if (ARC_BSWAP_TYPE == 1)		/******* Software only ********/



/* The kernel default implementation of htonl is

 *		return  x<<24 | x>>24 |

 *		 (x & (__u32)0x0000ff00UL)<<8 | (x & (__u32)0x00ff0000UL)>>8;

 *

 * This generates 9 instructions on ARC (excluding the ld/st)

 *

 * 8051fd8c:	ld     r3,[r7,20]	; Mem op : Get the value to be swapped

 * 8051fd98:	asl    r5,r3,24		; get  3rd Byte

 * 8051fd9c:	lsr    r2,r3,24		; get  0th Byte

 * 8051fda0:	and    r4,r3,0xff00

 * 8051fda8:	asl    r4,r4,8		; get 1st Byte

 * 8051fdac:	and    r3,r3,0x00ff0000

 * 8051fdb4:	or     r2,r2,r5		; combine 0th and 3rd Bytes

 * 8051fdb8:	lsr    r3,r3,8		; 2nd Byte at correct place in Dst Reg

 * 8051fdbc:	or     r2,r2,r4		; combine 0,3 Bytes with 1st Byte

 * 8051fdc0:	or     r2,r2,r3		; combine 0,3,1 Bytes with 2nd Byte

 * 8051fdc4:	st     r2,[r1,20]	; Mem op : save result back to mem

 *

 * Joern suggested a better "C" algorithm which is great since

 * (1) It is portable to any architecture

 * (2) At the same time it takes advantage of ARC ISA (rotate intrns)

 */



#define __arch_swab32(x)					\

({	unsigned long __in = (x), __tmp;			\

	__tmp = __in << 8 | __in >> 24; /* ror tmp,in,24 */	\

	__in = __in << 24 | __in >> 8; /* ror in,in,8 */	\

	__tmp ^= __in;						\

	__tmp &= 0xff00ff;					\

	__tmp ^ __in;						\

})



#elif (ARC_BSWAP_TYPE == 2)	/* Custom single cycle bswap instruction */



#define __arch_swab32(x)						\

({									\

	unsigned int tmp = x;						\

	__asm__(							\

	"	.extInstruction	bswap, 7, 0x00, SUFFIX_NONE, SYNTAX_2OP	\n"\

	"	bswap  %0, %1						\n"\

	: "=r" (tmp)							\

	: "r" (tmp));							\

	tmp;								\

})



#endif /* ARC_BSWAP_TYPE=zzz */



#endif /* CONFIG_ARC_HAS_SWAPE */



#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)

#define __SWAB_64_THRU_32__

#endif

arch/arm/include/asm/processor.h

+2 −1
Original line number Diff line number Diff line
@@ -73,7 +73,8 @@ static inline void arch_thread_struct_whitelist(unsigned long *offset, 
		regs->ARM_cpsr = USR26_MODE;				\

	if (elf_hwcap & HWCAP_THUMB && pc & 1)				\

		regs->ARM_cpsr |= PSR_T_BIT;				\

	regs->ARM_cpsr |= PSR_ENDSTATE;					\

	if (IS_ENABLED(CONFIG_CPU_ENDIAN_BE8))				\

		regs->ARM_cpsr |= PSR_E_BIT;				\

	regs->ARM_pc = pc & ~1;		/* pc */			\

	regs->ARM_sp = sp;		/* sp */			\

})

arch/arm/include/uapi/asm/ptrace.h

+0 −9
Original line number Diff line number Diff line
@@ -102,15 +102,6 @@ 
#define PSR_IT_MASK	0x0600fc00	/* If-Then execution state mask */

#define PSR_ENDIAN_MASK	0x00000200	/* Endianness state mask */



/*

 * Default endianness state

 */

#ifdef CONFIG_CPU_ENDIAN_BE8

#define PSR_ENDSTATE	PSR_E_BIT

#else

#define PSR_ENDSTATE	0

#endif



/* 

 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a

 * process is located in memory.