Commit 2b3a4192 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'dmaengine-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine 

Pull dmaengine updates from Vinod Koul:
 "New hardware support:
   - Allwinner H616 dma support
   - Renesas r8a779h0 dma controller support
   - TI CSI2RX dma support

  Updates:
   - Freescale edma driver updates for TCD64csupport for i.MX95
   - constify of pointers and args
   - Yaml conversion for MediaTek High-Speed controller binding
   - TI k3 udma support for TX/RX DMA channels for thread IDs:

* tag 'dmaengine-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (25 commits)
  dmaengine: of: constify of_phandle_args in of_dma_find_controller()
  dmaengine: pl08x: constify pointer to char in filter function
  MAINTAINERS: change in AMD ptdma maintainer
  MAINTAINERS: adjust file entry in MEDIATEK DMA DRIVER
  dmaengine: idxd: constify the struct device_type usage
  dt-bindings: renesas,rcar-dmac: Add r8a779h0 support
  dt-bindings: dma: convert MediaTek High-Speed controller to the json-schema
  dmaengine: idxd: make dsa_bus_type const
  dmaengine: fsl-edma: integrate TCD64 support for i.MX95
  dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string
  dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access
  dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chan
  dmaengine: fsl-edma: fix spare build warning
  dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd()
  dt-bindings: mmp-dma: convert to YAML
  dmaengine: ti: k3-psil-j721s2: Add entry for CSI2RX
  dmaengine: ti: k3-udma-glue: Add function to request RX chan for thread ID
  dmaengine: ti: k3-udma-glue: Add function to request TX chan for thread ID
  dmaengine: ti: k3-udma-glue: Update name for remote RX channel device
  dmaengine: ti: k3-udma-glue: Add function to parse channel by ID
  ...
parents b898db92 716141d3

Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml

+8 −4
Original line number Diff line number Diff line
@@ -28,6 +28,9 @@ properties: 
      - items:

          - const: allwinner,sun8i-r40-dma

          - const: allwinner,sun50i-a64-dma

      - items:

          - const: allwinner,sun50i-h616-dma

          - const: allwinner,sun50i-a100-dma



  reg:

    maxItems: 1
@@ -59,6 +62,7 @@ required: 
if:

  properties:

    compatible:

      contains:

        enum:

          - allwinner,sun20i-d1-dma

          - allwinner,sun50i-a100-dma

Documentation/devicetree/bindings/dma/fsl,edma.yaml

+2 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ properties: 
          - fsl,imx8qm-edma

          - fsl,imx93-edma3

          - fsl,imx93-edma4

          - fsl,imx95-edma5

      - items:

          - const: fsl,ls1028a-edma

          - const: fsl,vf610-edma
@@ -83,6 +84,7 @@ allOf: 
              - fsl,imx8qm-edma

              - fsl,imx93-edma3

              - fsl,imx93-edma4

              - fsl,imx95-edma5

    then:

      properties:

        "#dma-cells":

Documentation/devicetree/bindings/dma/marvell,mmp-dma.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/dma/marvell,mmp-dma.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Marvell MMP DMA controller



maintainers:

  - Duje Mihanović <duje.mihanovic@skole.hr>



description:

  Marvell MMP SoCs may have two types of DMA controllers, peripheral and audio.



properties:

  compatible:

    enum:

      - marvell,pdma-1.0

      - marvell,adma-1.0

      - marvell,pxa910-squ



  reg:

    maxItems: 1



  interrupts:

    description:

      Interrupt lines for the controller, may be shared or one per DMA channel

    minItems: 1



  asram:

    description:

      A phandle to the SRAM pool

    $ref: /schemas/types.yaml#/definitions/phandle



  '#dma-channels':

    deprecated: true



  '#dma-requests':

    deprecated: true



required:

  - compatible

  - reg

  - interrupts

  - '#dma-cells'



allOf:

  - $ref: dma-controller.yaml#

  - if:

      properties:

        compatible:

          contains:

            enum:

              - marvell,pdma-1.0

    then:

      properties:

        asram: false

    else:

      required:

        - asram



unevaluatedProperties: false



examples:

  - |

    dma-controller@d4000000 {

        compatible = "marvell,pdma-1.0";

        reg = <0xd4000000 0x10000>;

        interrupts = <47>;

        #dma-cells = <2>;

        dma-channels = <16>;

    };

Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/dma/mediatek,mt7622-hsdma.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: MediaTek High-Speed DMA Controller



maintainers:

  - Sean Wang <sean.wang@mediatek.com>



allOf:

  - $ref: dma-controller.yaml#



properties:

  compatible:

    enum:

      - mediatek,mt7622-hsdma

      - mediatek,mt7623-hsdma



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1



  clock-names:

    const: hsdma



  power-domains:

    maxItems: 1



  "#dma-cells":

    description: Channel number

    const: 1



required:

  - reg

  - interrupts

  - clocks

  - clock-names

  - power-domains



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/mt2701-clk.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/power/mt2701-power.h>



    dma-controller@1b007000 {

        compatible = "mediatek,mt7623-hsdma";

        reg = <0x1b007000 0x1000>;

        interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;

        clocks = <&ethsys CLK_ETHSYS_HSDMA>;

        clock-names = "hsdma";

        power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;

        #dma-cells = <1>;

    };

Documentation/devicetree/bindings/dma/mmp-dma.txt

deleted100644 → 0
+0 −81
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* MARVELL MMP DMA controller



Marvell Peripheral DMA Controller

Used platforms: pxa688, pxa910, pxa3xx, etc



Required properties:

- compatible: Should be "marvell,pdma-1.0"

- reg: Should contain DMA registers location and length.

- interrupts: Either contain all of the per-channel DMA interrupts

		or one irq for pdma device



Optional properties:

- dma-channels: Number of DMA channels supported by the controller (defaults

  to 32 when not specified)

- #dma-channels: deprecated

- dma-requests: Number of DMA requestor lines supported by the controller

  (defaults to 32 when not specified)

- #dma-requests: deprecated



"marvell,pdma-1.0"

Used platforms: pxa25x, pxa27x, pxa3xx, pxa93x, pxa168, pxa910, pxa688.



Examples:



/*

 * Each channel has specific irq

 * ICU parse out irq channel from ICU register,

 * while DMA controller may not able to distinguish the irq channel

 * Using this method, interrupt-parent is required as demuxer

 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,

 * 18~21 is ADMA irq

 */

pdma: dma-controller@d4000000 {

	      compatible = "marvell,pdma-1.0";

	      reg = <0xd4000000 0x10000>;

	      interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;

	      interrupt-parent = <&intcmux32>;

	      dma-channels = <16>;

      };



/*

 * One irq for all channels

 * Dmaengine driver (DMA controller) distinguish irq channel via

 * parsing internal register

 */

pdma: dma-controller@d4000000 {

	      compatible = "marvell,pdma-1.0";

	      reg = <0xd4000000 0x10000>;

	      interrupts = <47>;

	      dma-channels = <16>;

      };





Marvell Two Channel DMA Controller used specifically for audio

Used platforms: pxa688, pxa910



Required properties:

- compatible: Should be "marvell,adma-1.0" or "marvell,pxa910-squ"

- reg: Should contain DMA registers location and length.

- interrupts: Either contain all of the per-channel DMA interrupts

		or one irq for dma device



"marvell,adma-1.0" used on pxa688

"marvell,pxa910-squ" used on pxa910



Examples:



/* each channel has specific irq */

adma0: dma-controller@d42a0800 {

	      compatible = "marvell,adma-1.0";

	      reg = <0xd42a0800 0x100>;

	      interrupts = <18 19>;

	      interrupt-parent = <&intcmux32>;

      };



/* One irq for all channels */

squ: dma-controller@d42a0800 {

	      compatible = "marvell,pxa910-squ";

	      reg = <0xd42a0800 0x100>;

	      interrupts = <46>;

      };