Commit 2ca34b50 authored by Gabriel Shahrouzi's avatar Gabriel Shahrouzi Committed by Greg Kroah-Hartman
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staging: axis-fifo: Correct handling of tx_fifo_depth for size validation 



Remove erroneous subtraction of 4 from the total FIFO depth read from
device tree. The stored depth is for checking against total capacity,
not initial vacancy. This prevented writes near the FIFO's full size.

The check performed just before data transfer, which uses live reads of
the TDFV register to determine current vacancy, correctly handles the
initial Depth - 4 hardware state and subsequent FIFO fullness.

Fixes: 4a965c5f ("staging: add driver for Xilinx AXI-Stream FIFO v4.1 IP core")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarGabriel Shahrouzi <gshahrouzi@gmail.com>
Link: https://lore.kernel.org/r/20250419012937.674924-1-gshahrouzi@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 98698ca0

drivers/staging/axis-fifo/axis-fifo.c

+0 −3
Original line number Diff line number Diff line
@@ -775,9 +775,6 @@ static int axis_fifo_parse_dt(struct axis_fifo *fifo) 
		goto end;

	}



	/* IP sets TDFV to fifo depth - 4 so we will do the same */

	fifo->tx_fifo_depth -= 4;



	ret = get_dts_property(fifo, "xlnx,use-rx-data", &fifo->has_rx_fifo);

	if (ret) {

		dev_err(fifo->dt_device, "missing xlnx,use-rx-data property\n");