Commit 2d06aec5 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'mhi-for-v6.9' of...

Merge tag 'mhi-for-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi into char-misc-next

Manivannan writes:

MHI Host
========

- Added new MHI_PM_SYS_ERR_FAIL state to the MHI state machine to properly
  cleanup the channel state if the device fails to respond to the MHI reset
  during SYS_ERR handling. This issue was discovered with the Qualcomm AIC100 AI
  accelerator device.

- Modified the code that reads and exposes the OEM_PK_HASH registers through
  sysfs to read them on-demand instead of reading once during boot. Qualcomm
  AIC100 devices support provisioning the keys dynamically, so this allows the
  users to know the upto date information.

- Added tracepoint support to expose the debug information over tracefs.

- Reverted the commit that reads the MHI device revision from the device during
  boot. This is done because the read info was not used anywhere (dead code) and
  also it is not possible to read the revision info from all the devices.

- Constified the modem config for Telit FN980 modem as required by the MHI core.

MHI Endpoint
============

- Replaced kzalloc() with kcalloc() in an effort to avoid integer overflows
  during multiplication. Even though there is no potential overflow in the
  endpoint code, this is done for the sake of uniformity and best practice.

- Fixed the kmem_cache_create() failure check to use the correct variable.

* tag 'mhi-for-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi:
  bus: mhi: host: pci_generic: constify modem_telit_fn980_hw_v1_config
  bus: mhi: host: Change the trace string for the userspace tools mapping
  bus: mhi: ep: check the correct variable in mhi_ep_register_controller()
  Revert "bus: mhi: core: Add support for reading MHI info from device"
  bus: mhi: host: Add tracing support
  bus: mhi: ep: Use kcalloc() instead of kzalloc()
  bus: mhi: host: Read PK HASH dynamically
  bus: mhi: host: Add MHI_PM_SYS_ERR_FAIL state
parents d4551c18 2ec11b5d
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+19 −19
Original line number Diff line number Diff line
@@ -297,30 +297,30 @@ struct mhi_ring_element {
	__le32 dword[2];
};

#define MHI_STATE_LIST				\
	mhi_state(RESET,	"RESET")	\
	mhi_state(READY,	"READY")	\
	mhi_state(M0,		"M0")		\
	mhi_state(M1,		"M1")		\
	mhi_state(M2,		"M2")		\
	mhi_state(M3,		"M3")		\
	mhi_state(M3_FAST,	"M3_FAST")	\
	mhi_state(BHI,		"BHI")		\
	mhi_state_end(SYS_ERR,	"SYS ERROR")

#undef mhi_state
#undef mhi_state_end

#define mhi_state(a, b)		case MHI_STATE_##a: return b;
#define mhi_state_end(a, b)	case MHI_STATE_##a: return b;

static inline const char *mhi_state_str(enum mhi_state state)
{
	switch (state) {
	case MHI_STATE_RESET:
		return "RESET";
	case MHI_STATE_READY:
		return "READY";
	case MHI_STATE_M0:
		return "M0";
	case MHI_STATE_M1:
		return "M1";
	case MHI_STATE_M2:
		return "M2";
	case MHI_STATE_M3:
		return "M3";
	case MHI_STATE_M3_FAST:
		return "M3 FAST";
	case MHI_STATE_BHI:
		return "BHI";
	case MHI_STATE_SYS_ERR:
		return "SYS ERROR";
	MHI_STATE_LIST
	default:
		return "Unknown state";
	}
};
}

#endif /* _MHI_COMMON_H */
+4 −3
Original line number Diff line number Diff line
@@ -1149,7 +1149,8 @@ int mhi_ep_power_up(struct mhi_ep_cntrl *mhi_cntrl)
	mhi_ep_mmio_mask_interrupts(mhi_cntrl);
	mhi_ep_mmio_init(mhi_cntrl);

	mhi_cntrl->mhi_event = kzalloc(mhi_cntrl->event_rings * (sizeof(*mhi_cntrl->mhi_event)),
	mhi_cntrl->mhi_event = kcalloc(mhi_cntrl->event_rings,
				       sizeof(*mhi_cntrl->mhi_event),
				       GFP_KERNEL);
	if (!mhi_cntrl->mhi_event)
		return -ENOMEM;
@@ -1496,7 +1497,7 @@ int mhi_ep_register_controller(struct mhi_ep_cntrl *mhi_cntrl,
	mhi_cntrl->ring_item_cache = kmem_cache_create("mhi_ep_ring_item",
							sizeof(struct mhi_ep_ring_item), 0,
							0, NULL);
	if (!mhi_cntrl->ev_ring_el_cache) {
	if (!mhi_cntrl->ring_item_cache) {
		ret = -ENOMEM;
		goto err_destroy_tre_buf_cache;
	}
+1 −10
Original line number Diff line number Diff line
@@ -395,7 +395,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
	void *buf;
	dma_addr_t dma_addr;
	size_t size, fw_sz;
	int i, ret;
	int ret;

	if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {
		dev_err(dev, "Device MHI is not in valid state\n");
@@ -408,15 +408,6 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
	if (ret)
		dev_err(dev, "Could not capture serial number via BHI\n");

	for (i = 0; i < ARRAY_SIZE(mhi_cntrl->oem_pk_hash); i++) {
		ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_OEMPKHASH(i),
				   &mhi_cntrl->oem_pk_hash[i]);
		if (ret) {
			dev_err(dev, "Could not capture OEM PK HASH via BHI\n");
			break;
		}
	}

	/* wait for ready on pass through or any other execution environment */
	if (!MHI_FW_LOAD_CAPABLE(mhi_cntrl->ee))
		goto fw_load_ready_state;
+43 −48
Original line number Diff line number Diff line
@@ -20,50 +20,49 @@
#include <linux/wait.h>
#include "internal.h"

#define CREATE_TRACE_POINTS
#include "trace.h"

static DEFINE_IDA(mhi_controller_ida);

#undef mhi_ee
#undef mhi_ee_end

#define mhi_ee(a, b)		[MHI_EE_##a] = b,
#define mhi_ee_end(a, b)	[MHI_EE_##a] = b,

const char * const mhi_ee_str[MHI_EE_MAX] = {
	[MHI_EE_PBL] = "PRIMARY BOOTLOADER",
	[MHI_EE_SBL] = "SECONDARY BOOTLOADER",
	[MHI_EE_AMSS] = "MISSION MODE",
	[MHI_EE_RDDM] = "RAMDUMP DOWNLOAD MODE",
	[MHI_EE_WFW] = "WLAN FIRMWARE",
	[MHI_EE_PTHRU] = "PASS THROUGH",
	[MHI_EE_EDL] = "EMERGENCY DOWNLOAD",
	[MHI_EE_FP] = "FLASH PROGRAMMER",
	[MHI_EE_DISABLE_TRANSITION] = "DISABLE",
	[MHI_EE_NOT_SUPPORTED] = "NOT SUPPORTED",
	MHI_EE_LIST
};

#undef dev_st_trans
#undef dev_st_trans_end

#define dev_st_trans(a, b)	[DEV_ST_TRANSITION_##a] = b,
#define dev_st_trans_end(a, b)	[DEV_ST_TRANSITION_##a] = b,

const char * const dev_state_tran_str[DEV_ST_TRANSITION_MAX] = {
	[DEV_ST_TRANSITION_PBL] = "PBL",
	[DEV_ST_TRANSITION_READY] = "READY",
	[DEV_ST_TRANSITION_SBL] = "SBL",
	[DEV_ST_TRANSITION_MISSION_MODE] = "MISSION MODE",
	[DEV_ST_TRANSITION_FP] = "FLASH PROGRAMMER",
	[DEV_ST_TRANSITION_SYS_ERR] = "SYS ERROR",
	[DEV_ST_TRANSITION_DISABLE] = "DISABLE",
	DEV_ST_TRANSITION_LIST
};

#undef ch_state_type
#undef ch_state_type_end

#define ch_state_type(a, b)	[MHI_CH_STATE_TYPE_##a] = b,
#define ch_state_type_end(a, b)	[MHI_CH_STATE_TYPE_##a] = b,

const char * const mhi_ch_state_type_str[MHI_CH_STATE_TYPE_MAX] = {
	[MHI_CH_STATE_TYPE_RESET] = "RESET",
	[MHI_CH_STATE_TYPE_STOP] = "STOP",
	[MHI_CH_STATE_TYPE_START] = "START",
	MHI_CH_STATE_TYPE_LIST
};

#undef mhi_pm_state
#undef mhi_pm_state_end

#define mhi_pm_state(a, b)	[MHI_PM_STATE_##a] = b,
#define mhi_pm_state_end(a, b)	[MHI_PM_STATE_##a] = b,

static const char * const mhi_pm_state_str[] = {
	[MHI_PM_STATE_DISABLE] = "DISABLE",
	[MHI_PM_STATE_POR] = "POWER ON RESET",
	[MHI_PM_STATE_M0] = "M0",
	[MHI_PM_STATE_M2] = "M2",
	[MHI_PM_STATE_M3_ENTER] = "M?->M3",
	[MHI_PM_STATE_M3] = "M3",
	[MHI_PM_STATE_M3_EXIT] = "M3->M0",
	[MHI_PM_STATE_FW_DL_ERR] = "Firmware Download Error",
	[MHI_PM_STATE_SYS_ERR_DETECT] = "SYS ERROR Detect",
	[MHI_PM_STATE_SYS_ERR_PROCESS] = "SYS ERROR Process",
	[MHI_PM_STATE_SHUTDOWN_PROCESS] = "SHUTDOWN Process",
	[MHI_PM_STATE_LD_ERR_FATAL_DETECT] = "Linkdown or Error Fatal Detect",
	MHI_PM_STATE_LIST
};

const char *to_mhi_pm_state_str(u32 state)
@@ -97,11 +96,19 @@ static ssize_t oem_pk_hash_show(struct device *dev,
{
	struct mhi_device *mhi_dev = to_mhi_device(dev);
	struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
	int i, cnt = 0;
	u32 hash_segment[MHI_MAX_OEM_PK_HASH_SEGMENTS];
	int i, cnt = 0, ret;

	for (i = 0; i < ARRAY_SIZE(mhi_cntrl->oem_pk_hash); i++)
		cnt += sysfs_emit_at(buf, cnt, "OEMPKHASH[%d]: 0x%x\n",
				i, mhi_cntrl->oem_pk_hash[i]);
	for (i = 0; i < MHI_MAX_OEM_PK_HASH_SEGMENTS; i++) {
		ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_OEMPKHASH(i), &hash_segment[i]);
		if (ret) {
			dev_err(dev, "Could not capture OEM PK HASH\n");
			return ret;
		}
	}

	for (i = 0; i < MHI_MAX_OEM_PK_HASH_SEGMENTS; i++)
		cnt += sysfs_emit_at(buf, cnt, "OEMPKHASH[%d]: 0x%x\n", i, hash_segment[i]);

	return cnt;
}
@@ -907,7 +914,6 @@ int mhi_register_controller(struct mhi_controller *mhi_cntrl,
	struct mhi_chan *mhi_chan;
	struct mhi_cmd *mhi_cmd;
	struct mhi_device *mhi_dev;
	u32 soc_info;
	int ret, i;

	if (!mhi_cntrl || !mhi_cntrl->cntrl_dev || !mhi_cntrl->regs ||
@@ -982,17 +988,6 @@ int mhi_register_controller(struct mhi_controller *mhi_cntrl,
		mhi_cntrl->unmap_single = mhi_unmap_single_no_bb;
	}

	/* Read the MHI device info */
	ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs,
			   SOC_HW_VERSION_OFFS, &soc_info);
	if (ret)
		goto err_destroy_wq;

	mhi_cntrl->family_number = FIELD_GET(SOC_HW_VERSION_FAM_NUM_BMSK, soc_info);
	mhi_cntrl->device_number = FIELD_GET(SOC_HW_VERSION_DEV_NUM_BMSK, soc_info);
	mhi_cntrl->major_version = FIELD_GET(SOC_HW_VERSION_MAJOR_VER_BMSK, soc_info);
	mhi_cntrl->minor_version = FIELD_GET(SOC_HW_VERSION_MINOR_VER_BMSK, soc_info);

	mhi_cntrl->index = ida_alloc(&mhi_controller_ida, GFP_KERNEL);
	if (mhi_cntrl->index < 0) {
		ret = mhi_cntrl->index;
+47 −9
Original line number Diff line number Diff line
@@ -15,12 +15,6 @@ extern struct bus_type mhi_bus_type;
#define MHI_SOC_RESET_REQ_OFFSET			0xb0
#define MHI_SOC_RESET_REQ				BIT(0)

#define SOC_HW_VERSION_OFFS				0x224
#define SOC_HW_VERSION_FAM_NUM_BMSK			GENMASK(31, 28)
#define SOC_HW_VERSION_DEV_NUM_BMSK			GENMASK(27, 16)
#define SOC_HW_VERSION_MAJOR_VER_BMSK			GENMASK(15, 8)
#define SOC_HW_VERSION_MINOR_VER_BMSK			GENMASK(7, 0)

struct mhi_ctxt {
	struct mhi_event_ctxt *er_ctxt;
	struct mhi_chan_ctxt *chan_ctxt;
@@ -42,6 +36,11 @@ enum mhi_ch_state_type {
	MHI_CH_STATE_TYPE_MAX,
};

#define MHI_CH_STATE_TYPE_LIST				\
	ch_state_type(RESET,		"RESET")	\
	ch_state_type(STOP,		"STOP")		\
	ch_state_type_end(START,	"START")

extern const char * const mhi_ch_state_type_str[MHI_CH_STATE_TYPE_MAX];
#define TO_CH_STATE_TYPE_STR(state) (((state) >= MHI_CH_STATE_TYPE_MAX) ? \
				     "INVALID_STATE" : \
@@ -50,6 +49,18 @@ extern const char * const mhi_ch_state_type_str[MHI_CH_STATE_TYPE_MAX];
#define MHI_INVALID_BRSTMODE(mode) (mode != MHI_DB_BRST_DISABLE && \
				    mode != MHI_DB_BRST_ENABLE)

#define MHI_EE_LIST						\
	mhi_ee(PBL,			"PRIMARY BOOTLOADER")	\
	mhi_ee(SBL,			"SECONDARY BOOTLOADER")	\
	mhi_ee(AMSS,			"MISSION MODE")		\
	mhi_ee(RDDM,			"RAMDUMP DOWNLOAD MODE")\
	mhi_ee(WFW,			"WLAN FIRMWARE")	\
	mhi_ee(PTHRU,			"PASS THROUGH")		\
	mhi_ee(EDL,			"EMERGENCY DOWNLOAD")	\
	mhi_ee(FP,			"FLASH PROGRAMMER")	\
	mhi_ee(DISABLE_TRANSITION,	"DISABLE")		\
	mhi_ee_end(NOT_SUPPORTED,	"NOT SUPPORTED")

extern const char * const mhi_ee_str[MHI_EE_MAX];
#define TO_MHI_EXEC_STR(ee) (((ee) >= MHI_EE_MAX) ? \
			     "INVALID_EE" : mhi_ee_str[ee])
@@ -72,6 +83,15 @@ enum dev_st_transition {
	DEV_ST_TRANSITION_MAX,
};

#define DEV_ST_TRANSITION_LIST					\
	dev_st_trans(PBL,		"PBL")			\
	dev_st_trans(READY,		"READY")		\
	dev_st_trans(SBL,		"SBL")			\
	dev_st_trans(MISSION_MODE,	"MISSION MODE")		\
	dev_st_trans(FP,		"FLASH PROGRAMMER")	\
	dev_st_trans(SYS_ERR,		"SYS ERROR")		\
	dev_st_trans_end(DISABLE,	"DISABLE")

extern const char * const dev_state_tran_str[DEV_ST_TRANSITION_MAX];
#define TO_DEV_STATE_TRANS_STR(state) (((state) >= DEV_ST_TRANSITION_MAX) ? \
				"INVALID_STATE" : dev_state_tran_str[state])
@@ -88,11 +108,27 @@ enum mhi_pm_state {
	MHI_PM_STATE_FW_DL_ERR,
	MHI_PM_STATE_SYS_ERR_DETECT,
	MHI_PM_STATE_SYS_ERR_PROCESS,
	MHI_PM_STATE_SYS_ERR_FAIL,
	MHI_PM_STATE_SHUTDOWN_PROCESS,
	MHI_PM_STATE_LD_ERR_FATAL_DETECT,
	MHI_PM_STATE_MAX
};

#define MHI_PM_STATE_LIST							\
	mhi_pm_state(DISABLE,			"DISABLE")			\
	mhi_pm_state(POR,			"POWER ON RESET")		\
	mhi_pm_state(M0,			"M0")				\
	mhi_pm_state(M2,			"M2")				\
	mhi_pm_state(M3_ENTER,			"M?->M3")			\
	mhi_pm_state(M3,			"M3")				\
	mhi_pm_state(M3_EXIT,			"M3->M0")			\
	mhi_pm_state(FW_DL_ERR,			"Firmware Download Error")	\
	mhi_pm_state(SYS_ERR_DETECT,		"SYS ERROR Detect")		\
	mhi_pm_state(SYS_ERR_PROCESS,		"SYS ERROR Process")		\
	mhi_pm_state(SYS_ERR_FAIL,		"SYS ERROR Failure")		\
	mhi_pm_state(SHUTDOWN_PROCESS,		"SHUTDOWN Process")		\
	mhi_pm_state_end(LD_ERR_FATAL_DETECT,	"Linkdown or Error Fatal Detect")

#define MHI_PM_DISABLE					BIT(0)
#define MHI_PM_POR					BIT(1)
#define MHI_PM_M0					BIT(2)
@@ -104,14 +140,16 @@ enum mhi_pm_state {
#define MHI_PM_FW_DL_ERR				BIT(7)
#define MHI_PM_SYS_ERR_DETECT				BIT(8)
#define MHI_PM_SYS_ERR_PROCESS				BIT(9)
#define MHI_PM_SHUTDOWN_PROCESS				BIT(10)
#define MHI_PM_SYS_ERR_FAIL				BIT(10)
#define MHI_PM_SHUTDOWN_PROCESS				BIT(11)
/* link not accessible */
#define MHI_PM_LD_ERR_FATAL_DETECT			BIT(11)
#define MHI_PM_LD_ERR_FATAL_DETECT			BIT(12)

#define MHI_REG_ACCESS_VALID(pm_state)			((pm_state & (MHI_PM_POR | MHI_PM_M0 | \
						MHI_PM_M2 | MHI_PM_M3_ENTER | MHI_PM_M3_EXIT | \
						MHI_PM_SYS_ERR_DETECT | MHI_PM_SYS_ERR_PROCESS | \
						MHI_PM_SHUTDOWN_PROCESS | MHI_PM_FW_DL_ERR)))
						MHI_PM_SYS_ERR_FAIL | MHI_PM_SHUTDOWN_PROCESS |  \
						MHI_PM_FW_DL_ERR)))
#define MHI_PM_IN_ERROR_STATE(pm_state)			(pm_state >= MHI_PM_FW_DL_ERR)
#define MHI_PM_IN_FATAL_STATE(pm_state)			(pm_state == MHI_PM_LD_ERR_FATAL_DETECT)
#define MHI_DB_ACCESS_VALID(mhi_cntrl)			(mhi_cntrl->pm_state & mhi_cntrl->db_access)
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