Commit 2d421831 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.10-2024-06-06' of... 

Merge tag 'amd-drm-fixes-6.10-2024-06-06' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.10-2024-06-06:

amdgpu:
- Fix shutdown issues on some SMU 13.x platforms
- Silence some UBSAN flexible array warnings

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240606192348.3620805-1-alexander.deucher@amd.com
parents 1cfa043f c6c4dd54

drivers/gpu/drm/amd/include/pptable.h

+49 −42
Original line number Diff line number Diff line
@@ -480,7 +480,7 @@ typedef struct _StateArray{ 
	//how many states we have

	UCHAR ucNumEntries;



    ATOM_PPLIB_STATE_V2 states[1];

	ATOM_PPLIB_STATE_V2 states[] /* __counted_by(ucNumEntries) */;

}StateArray;
@@ -495,13 +495,12 @@ typedef struct _ClockInfoArray{ 
}ClockInfoArray;



typedef struct _NonClockInfoArray{



	//how many non-clock levels we have. normally should be same as number of states

	UCHAR ucNumEntries;

	//sizeof(ATOM_PPLIB_NONCLOCK_INFO)

	UCHAR ucEntrySize;



    ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[];

	ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[] __counted_by(ucNumEntries);

}NonClockInfoArray;



typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record
@@ -513,8 +512,10 @@ typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record 


typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Table

{

    UCHAR ucNumEntries;                                                // Number of entries.

    ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[1];             // Dynamically allocate entries.

	// Number of entries.

	UCHAR ucNumEntries;

	// Dynamically allocate entries.

	ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[] __counted_by(ucNumEntries);

}ATOM_PPLIB_Clock_Voltage_Dependency_Table;



typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record
@@ -529,8 +530,10 @@ typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record 


typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Table

{

    UCHAR ucNumEntries;                                                // Number of entries.

    ATOM_PPLIB_Clock_Voltage_Limit_Record entries[1];                  // Dynamically allocate entries.

	// Number of entries.

	UCHAR ucNumEntries;

	// Dynamically allocate entries.

	ATOM_PPLIB_Clock_Voltage_Limit_Record entries[] __counted_by(ucNumEntries);

}ATOM_PPLIB_Clock_Voltage_Limit_Table;



union _ATOM_PPLIB_CAC_Leakage_Record
@@ -553,8 +556,10 @@ typedef union _ATOM_PPLIB_CAC_Leakage_Record ATOM_PPLIB_CAC_Leakage_Record; 


typedef struct _ATOM_PPLIB_CAC_Leakage_Table

{

    UCHAR ucNumEntries;                                                 // Number of entries.

    ATOM_PPLIB_CAC_Leakage_Record entries[1];                           // Dynamically allocate entries.

	// Number of entries.

	UCHAR ucNumEntries;

	// Dynamically allocate entries.

	ATOM_PPLIB_CAC_Leakage_Record entries[] __counted_by(ucNumEntries);

}ATOM_PPLIB_CAC_Leakage_Table;



typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record
@@ -568,8 +573,10 @@ typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record 


typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Table

{

    UCHAR ucNumEntries;                                                 // Number of entries.

    ATOM_PPLIB_PhaseSheddingLimits_Record entries[1];                   // Dynamically allocate entries.

	// Number of entries.

	UCHAR ucNumEntries;

	// Dynamically allocate entries.

	ATOM_PPLIB_PhaseSheddingLimits_Record entries[] __counted_by(ucNumEntries);

}ATOM_PPLIB_PhaseSheddingLimits_Table;



typedef struct _VCEClockInfo{
@@ -581,7 +588,7 @@ typedef struct _VCEClockInfo{ 


typedef struct _VCEClockInfoArray{

	UCHAR ucNumEntries;

    VCEClockInfo entries[1];

	VCEClockInfo entries[] __counted_by(ucNumEntries);

}VCEClockInfoArray;



typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record
@@ -593,7 +600,7 @@ typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record 
typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table

{

	UCHAR numEntries;

    ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[1];

	ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[] __counted_by(numEntries);

}ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table;



typedef struct _ATOM_PPLIB_VCE_State_Record
@@ -605,7 +612,7 @@ typedef struct _ATOM_PPLIB_VCE_State_Record 
typedef struct _ATOM_PPLIB_VCE_State_Table

{

	UCHAR numEntries;

    ATOM_PPLIB_VCE_State_Record entries[1];

	ATOM_PPLIB_VCE_State_Record entries[] __counted_by(numEntries);

}ATOM_PPLIB_VCE_State_Table;
@@ -627,7 +634,7 @@ typedef struct _UVDClockInfo{ 


typedef struct _UVDClockInfoArray{

	UCHAR ucNumEntries;

    UVDClockInfo entries[1];

	UVDClockInfo entries[] __counted_by(ucNumEntries);

}UVDClockInfoArray;



typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record
@@ -639,7 +646,7 @@ typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record 
typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table

{

	UCHAR numEntries;

    ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[1];

	ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[] __counted_by(numEntries);

}ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table;



typedef struct _ATOM_PPLIB_UVD_Table
@@ -658,7 +665,7 @@ typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record 


typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{

	UCHAR numEntries;

    ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[];

	ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[] __counted_by(numEntries);

}ATOM_PPLIB_SAMClk_Voltage_Limit_Table;



typedef struct _ATOM_PPLIB_SAMU_Table
@@ -676,7 +683,7 @@ typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Record 


typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Table{

	UCHAR numEntries;

    ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[1];

	ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[] __counted_by(numEntries);

}ATOM_PPLIB_ACPClk_Voltage_Limit_Table;



typedef struct _ATOM_PPLIB_ACP_Table
@@ -745,7 +752,7 @@ typedef struct ATOM_PPLIB_VQ_Budgeting_Record{ 
typedef struct ATOM_PPLIB_VQ_Budgeting_Table {

	UCHAR revid;

	UCHAR numEntries;

    ATOM_PPLIB_VQ_Budgeting_Record         entries[1];

	ATOM_PPLIB_VQ_Budgeting_Record entries[] __counted_by(numEntries);

} ATOM_PPLIB_VQ_Budgeting_Table;



#pragma pack()

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c

+11 −9
Original line number Diff line number Diff line
@@ -226,7 +226,8 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en) 
	struct amdgpu_device *adev = smu->adev;

	int ret = 0;



	if (!en && adev->in_s4) {

	if (!en && !adev->in_s0ix) {

		if (adev->in_s4) {

			/* Adds a GFX reset as workaround just before sending the

			 * MP1_UNLOAD message to prevent GC/RLC/PMFW from entering

			 * an invalid state.
@@ -235,6 +236,7 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en) 
							      SMU_RESET_MODE_2, NULL);

			if (ret)

				return ret;

		}



		ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);

	}