Commit 2db03b5c authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: move DDI_CLK_VALFREQ next to other Cx0 PHY registers



Relocate DDI_CLK_VALFREQ register definition next to other Cx0 PHY
register macros.

Reviewed-by: default avatarLuca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241213115111.335474-3-jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 4821e26a
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+5 −0
Original line number Diff line number Diff line
@@ -9,6 +9,11 @@
#include "i915_reg_defs.h"
#include "intel_display_limits.h"

/* DDI Buffer Control */
#define _DDI_CLK_VALFREQ_A		0x64030
#define _DDI_CLK_VALFREQ_B		0x64130
#define DDI_CLK_VALFREQ(port)		_MMIO_PORT(port, _DDI_CLK_VALFREQ_A, _DDI_CLK_VALFREQ_B)

/*
 * Wrapper macro to convert from port number to the index used in some of the
 * registers. For Display version 20 and above it converts the port number to a
+0 −5
Original line number Diff line number Diff line
@@ -1067,11 +1067,6 @@
#define CLKGATE_DIS_PSL_EXT(pipe) \
	_MMIO_PIPE(pipe, _CLKGATE_DIS_PSL_EXT_A, _CLKGATE_DIS_PSL_EXT_B)

/* DDI Buffer Control */
#define _DDI_CLK_VALFREQ_A		0x64030
#define _DDI_CLK_VALFREQ_B		0x64130
#define DDI_CLK_VALFREQ(port)		_MMIO_PORT(port, _DDI_CLK_VALFREQ_A, _DDI_CLK_VALFREQ_B)

/*
 * Display engine regs
 */