Commit 2ef3886c authored by Christian Bruel's avatar Christian Bruel Committed by Thomas Gleixner
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irqchip/gic-v2m: Handle Multiple MSI base IRQ Alignment 



The PCI Local Bus Specification 3.0 (section 6.8.1.6) allows modifying the
low-order bits of the MSI Message DATA register to encode nr_irqs interrupt
numbers in the log2(nr_irqs) bits for the domain.

The problem arises if the base vector (GICV2m base spi) is not aligned with
nr_irqs; in this case, the low-order log2(nr_irqs) bits from the base
vector conflict with the nr_irqs masking, causing the wrong MSI interrupt
to be identified.

To fix this, use bitmap_find_next_zero_area_off() instead of
bitmap_find_free_region() to align the initial base vector with nr_irqs.

Signed-off-by: default avatarChristian Bruel <christian.bruel@foss.st.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/all/20250902091045.220847-1-christian.bruel@foss.st.com
parent d36bf356

drivers/irqchip/irq-gic-v2m.c

+9 −4
Original line number Diff line number Diff line
@@ -153,14 +153,19 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 
{

	msi_alloc_info_t *info = args;

	struct v2m_data *v2m = NULL, *tmp;

	int hwirq, offset, i, err = 0;

	int hwirq, i, err = 0;

	unsigned long offset;

	unsigned long align_mask = nr_irqs - 1;



	spin_lock(&v2m_lock);

	list_for_each_entry(tmp, &v2m_nodes, entry) {

		offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis,

						 get_count_order(nr_irqs));

		if (offset >= 0) {

		unsigned long align_off = tmp->spi_start - (tmp->spi_start & ~align_mask);



		offset = bitmap_find_next_zero_area_off(tmp->bm, tmp->nr_spis, 0,

							nr_irqs, align_mask, align_off);

		if (offset < tmp->nr_spis) {

			v2m = tmp;

			bitmap_set(v2m->bm, offset, nr_irqs);

			break;

		}

	}