Commit 2f0073af authored by Conor Dooley's avatar Conor Dooley Committed by Linus Walleij
Browse files

dt-bindings: pinctrl: document polarfire soc iomux0 pinmux 



On Polarfire SoC, iomux0 is responsible for routing functions to either
Multiprocessor Subsystem (MSS) IOs or to the FPGA fabric, where they
can either interface with custom RTL or be routed to the FPGA fabric's
IOs. Document it.

Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 38cf9d64

Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml

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+89 −0
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Microchip PolarFire SoC iomux0



maintainers:

  - Conor Dooley <conor.dooley@microchip.com>



description:

  iomux0 is responsible for routing some functions to either the FPGA fabric,

  or to MSSIOs. It only performs muxing, and has no IO configuration role, as

  fabric IOs are configured separately and just routing a function to MSSIOs is

  not sufficient for it to actually get mapped to an MSSIO, just makes it

  possible.



properties:

  compatible:

    oneOf:

      - const: microchip,mpfs-pinctrl-iomux0

      - items:

          - const: microchip,pic64gx-pinctrl-iomux0

          - const: microchip,mpfs-pinctrl-iomux0



  reg:

    maxItems: 1



  pinctrl-use-default: true



patternProperties:

  '^mux-':

    type: object

    $ref: pinmux-node.yaml

    additionalProperties: false



    properties:

      function:

        description:

          A string containing the name of the function to mux to the group.

        enum: [ spi0, spi1, i2c0, i2c1, can0, can1, qspi, uart0, uart1, uart2,

                uart3, uart4, mdio0, mdio1 ]



      groups:

        description:

          An array of strings. Each string contains the name of a group.

        items:

          enum: [ spi0_fabric, spi0_mssio, spi1_fabric, spi1_mssio, i2c0_fabric,

                  i2c0_mssio, i2c1_fabric, i2c1_mssio, can0_fabric, can0_mssio,

                  can1_fabric, can1_mssio, qspi_fabric, qspi_mssio,

                  uart0_fabric, uart0_mssio, uart1_fabric, uart1_mssio,

                  uart2_fabric, uart2_mssio, uart3_fabric, uart3_mssio,

                  uart4_fabric, uart4_mssio, mdio0_fabric, mdio0_mssio,

                  mdio1_fabric, mdio1_mssio ]



    required:

      - function

      - groups



required:

  - compatible

  - reg



additionalProperties: false



examples:

  - |

    soc {

      #size-cells = <1>;

      #address-cells = <1>;



      pinctrl@200 {

        compatible = "microchip,mpfs-pinctrl-iomux0";

        reg = <0x200 0x4>;



        mux-spi0-fabric {

          function = "spi0";

          groups = "spi0_fabric";

        };



        mux-spi1-mssio {

          function = "spi1";

          groups = "spi1_mssio";

        };

      };

    };



...

Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml

+12 −1
Original line number Diff line number Diff line
@@ -18,10 +18,17 @@ properties: 
    items:

      - const: microchip,mpfs-mss-top-sysreg

      - const: syscon

      - const: simple-mfd



  reg:

    maxItems: 1



  '#address-cells':

    const: 1



  '#size-cells':

    const: 1



  '#reset-cells':

    description:

      The AHB/AXI peripherals on the PolarFire SoC have reset support, so
@@ -31,6 +38,10 @@ properties: 
      of PolarFire clock/reset IDs.

    const: 1



  pinctrl@200:

    type: object

    $ref: /schemas/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml



required:

  - compatible

  - reg
@@ -40,7 +51,7 @@ additionalProperties: false 
examples:

  - |

    syscon@20002000 {

      compatible = "microchip,mpfs-mss-top-sysreg", "syscon";

      compatible = "microchip,mpfs-mss-top-sysreg", "syscon", "simple-mfd";

      reg = <0x20002000 0x1000>;

      #reset-cells = <1>;

    };