Commit 2fa29037 authored by Daniel Henrique Barboza's avatar Daniel Henrique Barboza Committed by Anup Patel
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RISC-V: KVM: add 'vlenb' Vector CSR 



Userspace requires 'vlenb' to be able to encode it in reg ID. Otherwise
it is not possible to retrieve any vector reg since we're returning
EINVAL if reg_size isn't vlenb (see kvm_riscv_vcpu_vreg_addr()).

Signed-off-by: default avatarDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 197bd237

arch/riscv/kvm/vcpu_vector.c

+15 −0
Original line number Diff line number Diff line
@@ -116,6 +116,9 @@ static int kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu, 
		case KVM_REG_RISCV_VECTOR_CSR_REG(vcsr):

			*reg_addr = &cntx->vector.vcsr;

			break;

		case KVM_REG_RISCV_VECTOR_CSR_REG(vlenb):

			*reg_addr = &cntx->vector.vlenb;

			break;

		case KVM_REG_RISCV_VECTOR_CSR_REG(datap):

		default:

			return -ENOENT;
@@ -174,6 +177,18 @@ int kvm_riscv_vcpu_set_reg_vector(struct kvm_vcpu *vcpu, 
	if (!riscv_isa_extension_available(isa, v))

		return -ENOENT;



	if (reg_num == KVM_REG_RISCV_VECTOR_CSR_REG(vlenb)) {

		struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;

		unsigned long reg_val;



		if (copy_from_user(&reg_val, uaddr, reg_size))

			return -EFAULT;

		if (reg_val != cntx->vector.vlenb)

			return -EINVAL;



		return 0;

	}



	rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_addr);

	if (rc)

		return rc;