Commit 302b84e8 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Revert "PCI: Mark LSI FW643 to avoid bus reset" 

This reverts commit 29a43dc1.

29a43dc1 ("PCI: Mark LSI FW643 to avoid bus reset") by Edmund was based
on the assumption that the LSI / Agere FW643 has a defect such that it
can't recover after a Secondary Bus Reset (SBR).

But Takashi Sakamoto reported that SBR works fine on this same FW643 device
in an AMD Ryzen 5 2400G system, so apparently there is some other aspect of
Edmund's system that accounts for the issue.

The down side of 29a43dc1 is that when the FW643 is assigned to a VM,
avoiding the SBR means we leak data out of the VM.

Revert 29a43dc1 until we figure out a better solution.  In the
meantime, we can use the sysfs "reset_method" interface to restrict the
available reset methods.

Link: https://lore.kernel.org/r/20240328212302.1582483-1-helgaas@kernel.org


Fixes: 29a43dc1 ("PCI: Mark LSI FW643 to avoid bus reset")
Reported-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
Link: https://lore.kernel.org/r/20240325012135.36861-1-o-takashi@sakamocchi.jp


Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
parent 3cf5abf2

drivers/pci/quirks.c

+0 −8
Original line number Diff line number Diff line
@@ -3765,14 +3765,6 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset); 
 */

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset);



/*

 * Apparently the LSI / Agere FW643 can't recover after a Secondary Bus

 * Reset and requires a power-off or suspend/resume and rescan.  Prevent

 * use of that reset.

 */

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATT, 0x5900, quirk_no_bus_reset);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATT, 0x5901, quirk_no_bus_reset);



/*

 * Some TI KeyStone C667X devices do not support bus/hot reset.  The PCIESS

 * automatically disables LTSSM when Secondary Bus Reset is received and