Commit 3044f928 authored by Antonino Maniscalco's avatar Antonino Maniscalco Committed by Rob Clark
Browse files

drm/msm/a6xx: Sync relevant adreno_pm4.xml changes 



In mesa CP_SET_CTXSWITCH_IB is renamed to CP_SET_AMBLE and some other
names are changed to match KGSL. Import those changes.

The changes have not been merged yet in mesa but are necessary for this
series.

Tested-by: default avatarRob Clark <robdclark@gmail.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK
Signed-off-by: default avatarAntonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618023/


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent e7ae83da

drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml

+17 −22
Original line number Diff line number Diff line
@@ -581,8 +581,7 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd"> 
                and forcibly switch to the indicated context.

	</doc>

	<value name="CP_CONTEXT_SWITCH" value="0x54" variants="A6XX"/>

	<!-- Note, kgsl calls this CP_SET_AMBLE: -->

	<value name="CP_SET_CTXSWITCH_IB" value="0x55" variants="A6XX-"/>

	<value name="CP_SET_AMBLE" value="0x55" variants="A6XX-"/>



	<!--

	Seems to always have the payload:
@@ -2013,42 +2012,38 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) 
	</reg32>

</domain>



<domain name="CP_SET_CTXSWITCH_IB" width="32">

<domain name="CP_SET_AMBLE" width="32">

	<doc>

                Used by the userspace driver to set various IB's which are

                executed during context save/restore for handling

                state that isn't restored by the

                context switch routine itself.

                Used by the userspace and kernel drivers to set various IB's

                which are executed during context save/restore for handling

                state that isn't restored by the context switch routine itself.

  </doc>

	<enum name="ctxswitch_ib">

		<value name="RESTORE_IB" value="0">

	<enum name="amble_type">

		<value name="PREAMBLE_AMBLE_TYPE" value="0">

			<doc>Executed unconditionally when switching back to the context.</doc>

		</value>

		<value name="YIELD_RESTORE_IB" value="1">

		<value name="BIN_PREAMBLE_AMBLE_TYPE" value="1">

                        <doc>

				Executed when switching back after switching

				away during execution of

				a CP_SET_MARKER packet with RM6_YIELD as the

				payload *and* the normal save routine was

				bypassed for a shorter one. I think this is

				connected to the "skipsaverestore" bit set by

				the kernel when preempting.

				a CP_SET_MARKER packet with RM6_BIN_RENDER_END as the

				payload *and* skipsaverestore is set. This is

				expected to restore static register values not

				saved when skipsaverestore is set.

			</doc>

		</value>

		<value name="SAVE_IB" value="2">

		<value name="POSTAMBLE_AMBLE_TYPE" value="2">

                        <doc>

				Executed when switching away from the context,

				except for context switches initiated via

				CP_YIELD.

                        </doc>

		</value>

		<value name="RB_SAVE_IB" value="3">

		<value name="KMD_AMBLE_TYPE" value="3">

			<doc>

				This can only be set by the RB (i.e. the kernel)

				and executes with protected mode off, but

				is otherwise similar to SAVE_IB.



				Note, kgsl calls this CP_KMD_AMBLE_TYPE

				is otherwise similar to POSTAMBLE_AMBLE_TYPE.

			</doc>

		</value>

	</enum>
@@ -2060,7 +2055,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) 
	</reg32>

	<reg32 offset="2" name="2">

		<bitfield name="DWORDS" low="0" high="19" type="uint"/>

		<bitfield name="TYPE" low="20" high="21" type="ctxswitch_ib"/>

		<bitfield name="TYPE" low="20" high="21" type="amble_type"/>

	</reg32>

</domain>