Commit 30500c2a authored by Gabriel Fernandez's avatar Gabriel Fernandez Committed by Stephen Boyd
Browse files

clk: stm32mp1: use stm32mp13 reset driver 



STM32MP15 is now using the same reset driver as STM32MP13 as they
have the same binding requirement.

Signed-off-by: default avatarGabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20231208143700.354785-3-gabriel.fernandez@foss.st.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 3ac7ca59

drivers/clk/stm32/Makefile

+1 −1
Original line number Diff line number Diff line 
obj-$(CONFIG_COMMON_CLK_STM32MP135)	+= clk-stm32mp13.o clk-stm32-core.o reset-stm32.o

obj-$(CONFIG_COMMON_CLK_STM32MP157)	+= clk-stm32mp1.o
 
obj-$(CONFIG_COMMON_CLK_STM32MP157)	+= clk-stm32mp1.o reset-stm32.o

drivers/clk/stm32/clk-stm32-core.c

+4 −1
Original line number Diff line number Diff line
@@ -70,6 +70,7 @@ static int stm32_rcc_clock_init(struct device *dev, 
int stm32_rcc_init(struct device *dev, const struct of_device_id *match_data,

		   void __iomem *base)

{

	const struct stm32_rcc_match_data *rcc_match_data;

	const struct of_device_id *match;

	int err;
@@ -79,8 +80,10 @@ int stm32_rcc_init(struct device *dev, const struct of_device_id *match_data, 
		return -ENODEV;

	}



	rcc_match_data = match->data;



	/* RCC Reset Configuration */

	err = stm32_rcc_reset_init(dev, match, base);

	err = stm32_rcc_reset_init(dev, rcc_match_data->reset_data, base);

	if (err) {

		pr_err("stm32 reset failed to initialize\n");

		return err;

drivers/clk/stm32/clk-stm32-core.h

+1 −4
Original line number Diff line number Diff line
@@ -70,15 +70,12 @@ struct stm32_rcc_match_data { 
	const struct clock_config	*tab_clocks;

	unsigned int			maxbinding;

	struct clk_stm32_clock_data	*clock_data;

	u32				clear_offset;

	struct clk_stm32_reset_data	*reset_data;

	int (*check_security)(void __iomem *base,

			      const struct clock_config *cfg);

	int (*multi_mux)(void __iomem *base, const struct clock_config *cfg);

};



int stm32_rcc_reset_init(struct device *dev, const struct of_device_id *match,

			 void __iomem *base);



int stm32_rcc_init(struct device *dev, const struct of_device_id *match_data,

		   void __iomem *base);

drivers/clk/stm32/clk-stm32mp1.c

+16 −111
Original line number Diff line number Diff line
@@ -20,6 +20,10 @@ 


#include <dt-bindings/clock/stm32mp1-clks.h>



#include "reset-stm32.h"



#define STM32MP1_RESET_ID_MASK GENMASK(15, 0)



static DEFINE_SPINLOCK(rlock);



#define RCC_OCENSETR		0x0C
@@ -2137,22 +2141,27 @@ struct stm32_rcc_match_data { 
	const struct clock_config *cfg;

	unsigned int num;

	unsigned int maxbinding;

	u32 clear_offset;

	struct clk_stm32_reset_data *reset_data;

	bool (*check_security)(const struct clock_config *cfg);

};



static struct clk_stm32_reset_data stm32mp1_reset_data = {

	.nr_lines	= STM32MP1_RESET_ID_MASK,

	.clear_offset	= RCC_CLR,

};



static struct stm32_rcc_match_data stm32mp1_data = {

	.cfg		= stm32mp1_clock_cfg,

	.num		= ARRAY_SIZE(stm32mp1_clock_cfg),

	.maxbinding	= STM32MP1_LAST_CLK,

	.clear_offset	= RCC_CLR,

	.reset_data	= &stm32mp1_reset_data,

};



static struct stm32_rcc_match_data stm32mp1_data_secure = {

	.cfg		= stm32mp1_clock_cfg,

	.num		= ARRAY_SIZE(stm32mp1_clock_cfg),

	.maxbinding	= STM32MP1_LAST_CLK,

	.clear_offset	= RCC_CLR,

	.reset_data	= &stm32mp1_reset_data,

	.check_security = &stm32_check_security

};
@@ -2193,113 +2202,6 @@ static int stm32_register_hw_clk(struct device *dev, 
	return 0;

}



#define STM32_RESET_ID_MASK GENMASK(15, 0)



struct stm32_reset_data {

	/* reset lock */

	spinlock_t			lock;

	struct reset_controller_dev	rcdev;

	void __iomem			*membase;

	u32				clear_offset;

};



static inline struct stm32_reset_data *

to_stm32_reset_data(struct reset_controller_dev *rcdev)

{

	return container_of(rcdev, struct stm32_reset_data, rcdev);

}



static int stm32_reset_update(struct reset_controller_dev *rcdev,

			      unsigned long id, bool assert)

{

	struct stm32_reset_data *data = to_stm32_reset_data(rcdev);

	int reg_width = sizeof(u32);

	int bank = id / (reg_width * BITS_PER_BYTE);

	int offset = id % (reg_width * BITS_PER_BYTE);



	if (data->clear_offset) {

		void __iomem *addr;



		addr = data->membase + (bank * reg_width);

		if (!assert)

			addr += data->clear_offset;



		writel(BIT(offset), addr);



	} else {

		unsigned long flags;

		u32 reg;



		spin_lock_irqsave(&data->lock, flags);



		reg = readl(data->membase + (bank * reg_width));



		if (assert)

			reg |= BIT(offset);

		else

			reg &= ~BIT(offset);



		writel(reg, data->membase + (bank * reg_width));



		spin_unlock_irqrestore(&data->lock, flags);

	}



	return 0;

}



static int stm32_reset_assert(struct reset_controller_dev *rcdev,

			      unsigned long id)

{

	return stm32_reset_update(rcdev, id, true);

}



static int stm32_reset_deassert(struct reset_controller_dev *rcdev,

				unsigned long id)

{

	return stm32_reset_update(rcdev, id, false);

}



static int stm32_reset_status(struct reset_controller_dev *rcdev,

			      unsigned long id)

{

	struct stm32_reset_data *data = to_stm32_reset_data(rcdev);

	int reg_width = sizeof(u32);

	int bank = id / (reg_width * BITS_PER_BYTE);

	int offset = id % (reg_width * BITS_PER_BYTE);

	u32 reg;



	reg = readl(data->membase + (bank * reg_width));



	return !!(reg & BIT(offset));

}



static const struct reset_control_ops stm32_reset_ops = {

	.assert		= stm32_reset_assert,

	.deassert	= stm32_reset_deassert,

	.status		= stm32_reset_status,

};



static int stm32_rcc_reset_init(struct device *dev, void __iomem *base,

				const struct of_device_id *match)

{

	const struct stm32_rcc_match_data *data = match->data;

	struct stm32_reset_data *reset_data = NULL;



	reset_data = kzalloc(sizeof(*reset_data), GFP_KERNEL);

	if (!reset_data)

		return -ENOMEM;



	spin_lock_init(&reset_data->lock);

	reset_data->membase = base;

	reset_data->rcdev.owner = THIS_MODULE;

	reset_data->rcdev.ops = &stm32_reset_ops;

	reset_data->rcdev.of_node = dev_of_node(dev);

	reset_data->rcdev.nr_resets = STM32_RESET_ID_MASK;

	reset_data->clear_offset = data->clear_offset;



	return reset_controller_register(&reset_data->rcdev);

}



static int stm32_rcc_clock_init(struct device *dev, void __iomem *base,

				const struct of_device_id *match)

{
@@ -2342,6 +2244,7 @@ static int stm32_rcc_clock_init(struct device *dev, void __iomem *base, 
static int stm32_rcc_init(struct device *dev, void __iomem *base,

			  const struct of_device_id *match_data)

{

	const struct stm32_rcc_match_data *rcc_match_data;

	const struct of_device_id *match;

	int err;
@@ -2351,8 +2254,10 @@ static int stm32_rcc_init(struct device *dev, void __iomem *base, 
		return -ENODEV;

	}



	rcc_match_data = match->data;



	/* RCC Reset Configuration */

	err = stm32_rcc_reset_init(dev, base, match);

	err = stm32_rcc_reset_init(dev, rcc_match_data->reset_data, base);

	if (err) {

		pr_err("stm32mp1 reset failed to initialize\n");

		return err;

drivers/clk/stm32/clk-stm32mp13.c

+8 −1
Original line number Diff line number Diff line
@@ -10,8 +10,10 @@ 
#include <linux/platform_device.h>

#include <dt-bindings/clock/stm32mp13-clks.h>

#include "clk-stm32-core.h"

#include "reset-stm32.h"

#include "stm32mp13_rcc.h"



#define STM32MP1_RESET_ID_MASK GENMASK(15, 0)

#define RCC_CLR_OFFSET		0x4



/* STM32 Gates definition */
@@ -1511,13 +1513,18 @@ static struct clk_stm32_clock_data stm32mp13_clock_data = { 
	.is_multi_mux	= stm32mp13_is_multi_mux,

};



static struct clk_stm32_reset_data stm32mp13_reset_data = {

	.nr_lines	= STM32MP1_RESET_ID_MASK,

	.clear_offset	= RCC_CLR_OFFSET,

};



static const struct stm32_rcc_match_data stm32mp13_data = {

	.tab_clocks	= stm32mp13_clock_cfg,

	.num_clocks	= ARRAY_SIZE(stm32mp13_clock_cfg),

	.clock_data	= &stm32mp13_clock_data,

	.check_security = &stm32mp13_clock_is_provided_by_secure,

	.maxbinding	= STM32MP1_LAST_CLK,

	.clear_offset	= RCC_CLR_OFFSET,

	.reset_data	= &stm32mp13_reset_data,

};



static const struct of_device_id stm32mp13_match_data[] = {