Commit 307ce8bd authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/vcn2.5: add set_pg_state callback 



Rework the code as a vcn instance callback.

Reviewed-by: default avatarBoyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 40c6d558

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

+20 −17
Original line number Diff line number Diff line
@@ -95,9 +95,8 @@ static const struct amdgpu_hwip_reg_entry vcn_reg_list_2_5[] = { 
static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev);

static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev);

static void vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev);

static int vcn_v2_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,

					       enum amd_powergating_state state,

					       int i);

static int vcn_v2_5_set_pg_state(struct amdgpu_vcn_inst *vinst,

				 enum amd_powergating_state state);

static int vcn_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block,

					  enum amd_powergating_state state);

static int vcn_v2_5_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
@@ -150,6 +149,8 @@ static int vcn_v2_5_early_init(struct amdgpu_ip_block *ip_block) 
	vcn_v2_5_set_ras_funcs(adev);



	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {

		adev->vcn.inst[i].set_pg_state = vcn_v2_5_set_pg_state;



		r = amdgpu_vcn_early_init(adev, i);

		if (r)

			return r;
@@ -400,18 +401,20 @@ static int vcn_v2_5_hw_fini(struct amdgpu_ip_block *ip_block) 
	int i;



	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {

		struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];



		if (adev->vcn.harvest_config & (1 << i))

			continue;



		cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work);

		cancel_delayed_work_sync(&vinst->idle_work);



		if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||

		    (adev->vcn.inst[i].cur_state != AMD_PG_STATE_GATE &&

		    (vinst->cur_state != AMD_PG_STATE_GATE &&

		     RREG32_SOC15(VCN, i, mmUVD_STATUS)))

			vcn_v2_5_set_powergating_state_inst(ip_block, AMD_PG_STATE_GATE, i);

			vinst->set_pg_state(vinst, AMD_PG_STATE_GATE);



		if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN))

			amdgpu_irq_put(adev, &adev->vcn.inst[i].ras_poison_irq, 0);

			amdgpu_irq_put(adev, &vinst->ras_poison_irq, 0);

	}



	return 0;
@@ -1848,18 +1851,16 @@ static int vcn_v2_5_set_clockgating_state(struct amdgpu_ip_block *ip_block, 
	return 0;

}



static int vcn_v2_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,

					       enum amd_powergating_state state,

					       int i)

static int vcn_v2_5_set_pg_state(struct amdgpu_vcn_inst *vinst,

				 enum amd_powergating_state state)

{

	struct amdgpu_device *adev = ip_block->adev;

	struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];

	struct amdgpu_device *adev = vinst->adev;

	int ret;



	if (amdgpu_sriov_vf(adev))

		return 0;



	if (state == adev->vcn.inst[i].cur_state)

	if (state == vinst->cur_state)

		return 0;



	if (state == AMD_PG_STATE_GATE)
@@ -1868,7 +1869,7 @@ static int vcn_v2_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block, 
		ret = vcn_v2_5_start(vinst);



	if (!ret)

		adev->vcn.inst[i].cur_state = state;

		vinst->cur_state = state;



	return ret;

}
@@ -1879,9 +1880,11 @@ static int vcn_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block, 
	struct amdgpu_device *adev = ip_block->adev;

	int ret = 0, i;



	for (i = 0; i < adev->vcn.num_vcn_inst; ++i)

		ret |= vcn_v2_5_set_powergating_state_inst(ip_block,

							   state, i);

	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {

		struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];



		ret |= vinst->set_pg_state(vinst, state);

	}



	return ret;

}