Commit 30a22b8c authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'mlx5e-rc2-misc-patches' 

Tariq Toukan says:

====================
mlx5e rc2 misc patches (part)

This patchset includes small features and a cleanup for the mlx5e driver.

Patches 1-2 by Cosmin implements FEC settings for 100G/lane modes.

Patch 3 is a simple cleanup.
====================

Link: https://lore.kernel.org/r/20240404173357.123307-1-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents da48a65f 958f56e4

drivers/net/ethernet/mellanox/mlx5/core/en.h

+0 −12
Original line number Diff line number Diff line
@@ -1143,7 +1143,6 @@ void mlx5e_close_drop_rq(struct mlx5e_rq *drop_rq); 
int mlx5e_create_tis(struct mlx5_core_dev *mdev, void *in, u32 *tisn);

void mlx5e_destroy_tis(struct mlx5_core_dev *mdev, u32 tisn);



int mlx5e_update_nic_rx(struct mlx5e_priv *priv);

void mlx5e_update_carrier(struct mlx5e_priv *priv);

int mlx5e_close(struct net_device *netdev);

int mlx5e_open(struct net_device *netdev);
@@ -1180,23 +1179,12 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv, 
			       struct ethtool_coalesce *coal,

			       struct kernel_ethtool_coalesce *kernel_coal,

			       struct netlink_ext_ack *extack);

int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,

				     struct ethtool_link_ksettings *link_ksettings);

int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,

				     const struct ethtool_link_ksettings *link_ksettings);

int mlx5e_get_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh);

int mlx5e_set_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh,

		   struct netlink_ext_ack *extack);

u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv);

u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv);

int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,

			      struct ethtool_ts_info *info);

int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,

			       struct ethtool_flash *flash);

void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,

				  struct ethtool_pauseparam *pauseparam);

int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,

				 struct ethtool_pauseparam *pauseparam);



/* mlx5e generic netdev management API */

static inline bool

drivers/net/ethernet/mellanox/mlx5/core/en/port.c

+44 −6
Original line number Diff line number Diff line
@@ -292,10 +292,15 @@ enum mlx5e_fec_supported_link_mode { 
	MLX5E_FEC_SUPPORTED_LINK_MODE_100G_2X,

	MLX5E_FEC_SUPPORTED_LINK_MODE_200G_4X,

	MLX5E_FEC_SUPPORTED_LINK_MODE_400G_8X,

	MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X,

	MLX5E_FEC_SUPPORTED_LINK_MODE_200G_2X,

	MLX5E_FEC_SUPPORTED_LINK_MODE_400G_4X,

	MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X,

	MLX5E_MAX_FEC_SUPPORTED_LINK_MODE,

};



#define MLX5E_FEC_FIRST_50G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_50G_1X

#define MLX5E_FEC_FIRST_100G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X



#define MLX5E_FEC_OVERRIDE_ADMIN_POLICY(buf, policy, write, link)			\

	do {										\
@@ -308,6 +313,17 @@ enum mlx5e_fec_supported_link_mode { 
			*_policy = MLX5_GET(pplm_reg, _buf, fec_override_admin_##link);	\

	} while (0)



/* Returns true if FEC can be set for a given link mode. */

static bool mlx5e_is_fec_supported_link_mode(struct mlx5_core_dev *dev,

					     enum mlx5e_fec_supported_link_mode link_mode)

{

	return link_mode < MLX5E_FEC_FIRST_50G_PER_LANE_MODE ||

	       (link_mode < MLX5E_FEC_FIRST_100G_PER_LANE_MODE &&

		MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm)) ||

	       (link_mode >= MLX5E_FEC_FIRST_100G_PER_LANE_MODE &&

		MLX5_CAP_PCAM_FEATURE(dev, fec_100G_per_lane_in_pplm));

}



/* get/set FEC admin field for a given speed */

static int mlx5e_fec_admin_field(u32 *pplm, u16 *fec_policy, bool write,

				 enum mlx5e_fec_supported_link_mode link_mode)
@@ -340,6 +356,18 @@ static int mlx5e_fec_admin_field(u32 *pplm, u16 *fec_policy, bool write, 
	case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_8X:

		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 400g_8x);

		break;

	case MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X:

		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 100g_1x);

		break;

	case MLX5E_FEC_SUPPORTED_LINK_MODE_200G_2X:

		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 200g_2x);

		break;

	case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_4X:

		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 400g_4x);

		break;

	case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X:

		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 800g_8x);

		break;

	default:

		return -EINVAL;

	}
@@ -381,6 +409,18 @@ static int mlx5e_get_fec_cap_field(u32 *pplm, u16 *fec_cap, 
	case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_8X:

		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 400g_8x);

		break;

	case MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X:

		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 100g_1x);

		break;

	case MLX5E_FEC_SUPPORTED_LINK_MODE_200G_2X:

		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 200g_2x);

		break;

	case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_4X:

		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 400g_4x);

		break;

	case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X:

		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 800g_8x);

		break;

	default:

		return -EINVAL;

	}
@@ -389,7 +429,6 @@ static int mlx5e_get_fec_cap_field(u32 *pplm, u16 *fec_cap, 


bool mlx5e_fec_in_caps(struct mlx5_core_dev *dev, int fec_policy)

{

	bool fec_50g_per_lane = MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm);

	u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {};

	u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {};

	int sz = MLX5_ST_SZ_BYTES(pplm_reg);
@@ -407,7 +446,7 @@ bool mlx5e_fec_in_caps(struct mlx5_core_dev *dev, int fec_policy) 
	for (i = 0; i < MLX5E_MAX_FEC_SUPPORTED_LINK_MODE; i++) {

		u16 fec_caps;



		if (i >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE && !fec_50g_per_lane)

		if (!mlx5e_is_fec_supported_link_mode(dev, i))

			break;



		mlx5e_get_fec_cap_field(out, &fec_caps, i);
@@ -420,7 +459,6 @@ bool mlx5e_fec_in_caps(struct mlx5_core_dev *dev, int fec_policy) 
int mlx5e_get_fec_mode(struct mlx5_core_dev *dev, u32 *fec_mode_active,

		       u16 *fec_configured_mode)

{

	bool fec_50g_per_lane = MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm);

	u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {};

	u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {};

	int sz = MLX5_ST_SZ_BYTES(pplm_reg);
@@ -445,7 +483,7 @@ int mlx5e_get_fec_mode(struct mlx5_core_dev *dev, u32 *fec_mode_active, 


	*fec_configured_mode = 0;

	for (i = 0; i < MLX5E_MAX_FEC_SUPPORTED_LINK_MODE; i++) {

		if (i >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE && !fec_50g_per_lane)

		if (!mlx5e_is_fec_supported_link_mode(dev, i))

			break;



		mlx5e_fec_admin_field(out, fec_configured_mode, 0, i);
@@ -489,13 +527,13 @@ int mlx5e_set_fec_mode(struct mlx5_core_dev *dev, u16 fec_policy) 
		u16 conf_fec = fec_policy;

		u16 fec_caps = 0;



		if (i >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE && !fec_50g_per_lane)

		if (!mlx5e_is_fec_supported_link_mode(dev, i))

			break;



		/* RS fec in ethtool is mapped to MLX5E_FEC_RS_528_514

		 * to link modes up to 25G per lane and to

		 * MLX5E_FEC_RS_544_514 in the new link modes based on

		 * 50 G per lane

		 * 50G or 100G per lane

		 */

		if (conf_fec == (1 << MLX5E_FEC_RS_528_514) &&

		    i >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE)

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

+11 −11
Original line number Diff line number Diff line
@@ -996,7 +996,7 @@ static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp, 
	ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);

}



int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,

static int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,

					    struct ethtool_link_ksettings *link_ksettings)

{

	struct mlx5_core_dev *mdev = priv->mdev;
@@ -1167,7 +1167,7 @@ static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_suppo 
	return  autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;

}



int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,

static int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,

					    const struct ethtool_link_ksettings *link_ksettings)

{

	struct mlx5_core_dev *mdev = priv->mdev;
@@ -1268,7 +1268,7 @@ static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev) 
	return mlx5e_ethtool_get_rxfh_indir_size(priv);

}



int mlx5e_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)

static int mlx5e_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)

{

	struct mlx5e_priv *priv = netdev_priv(netdev);

	u32 rss_context = rxfh->rss_context;
@@ -1281,7 +1281,7 @@ int mlx5e_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh) 
	return err;

}



int mlx5e_set_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh,

static int mlx5e_set_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh,

			  struct netlink_ext_ack *extack)

{

	struct mlx5e_priv *priv = netdev_priv(dev);
@@ -1411,7 +1411,7 @@ static void mlx5e_get_pause_stats(struct net_device *netdev, 
	mlx5e_stats_pause_get(priv, pause_stats);

}



void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,

static void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,

					 struct ethtool_pauseparam *pauseparam)

{

	struct mlx5_core_dev *mdev = priv->mdev;
@@ -1433,7 +1433,7 @@ static void mlx5e_get_pauseparam(struct net_device *netdev, 
	mlx5e_ethtool_get_pauseparam(priv, pauseparam);

}



int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,

static int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,

					struct ethtool_pauseparam *pauseparam)

{

	struct mlx5_core_dev *mdev = priv->mdev;

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

+1 −1
Original line number Diff line number Diff line
@@ -5562,7 +5562,7 @@ static void mlx5e_nic_disable(struct mlx5e_priv *priv) 
	mlx5e_ipsec_cleanup(priv);

}



int mlx5e_update_nic_rx(struct mlx5e_priv *priv)

static int mlx5e_update_nic_rx(struct mlx5e_priv *priv)

{

	return mlx5e_refresh_tirs(priv, false, false);

}

include/linux/mlx5/mlx5_ifc.h

+18 −2
Original line number Diff line number Diff line
@@ -9817,7 +9817,21 @@ struct mlx5_ifc_pplm_reg_bits { 
	u8         fec_override_admin_100g_2x[0x10];

	u8         fec_override_admin_50g_1x[0x10];



	u8         reserved_at_140[0x140];

	u8         fec_override_cap_800g_8x[0x10];

	u8         fec_override_cap_400g_4x[0x10];



	u8         fec_override_cap_200g_2x[0x10];

	u8         fec_override_cap_100g_1x[0x10];



	u8         reserved_at_180[0xa0];



	u8         fec_override_admin_800g_8x[0x10];

	u8         fec_override_admin_400g_4x[0x10];



	u8         fec_override_admin_200g_2x[0x10];

	u8         fec_override_admin_100g_1x[0x10];



	u8         reserved_at_260[0x20];

};



struct mlx5_ifc_ppcnt_reg_bits {
@@ -10189,7 +10203,9 @@ struct mlx5_ifc_mtutc_reg_bits { 
};



struct mlx5_ifc_pcam_enhanced_features_bits {

	u8         reserved_at_0[0x68];

	u8         reserved_at_0[0x48];

	u8         fec_100G_per_lane_in_pplm[0x1];

	u8         reserved_at_49[0x1f];

	u8         fec_50G_per_lane_in_pplm[0x1];

	u8         reserved_at_69[0x4];

	u8         rx_icrc_encapsulated_counter[0x1];