Commit 30c30990 authored by Deepak Gupta's avatar Deepak Gupta Committed by Paul Walmsley
Browse files

riscv/hwprobe: add zicfilp / zicfiss enumeration in hwprobe 



Add enumeration of the zicfilp and zicfiss extensions in the hwprobe syscall.

Reviewed-by: default avatarZong Li <zong.li@sifive.com>
Signed-off-by: default avatarDeepak Gupta <debug@rivosinc.com>
Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de> # QEMU, custom CVA6
Tested-by: default avatarValentin Haudiquet <valentin.haudiquet@canonical.com>
Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-20-b55691eacf4f@rivosinc.com


[pjw@kernel.org: updated to apply; extend into RISCV_HWPROBE_KEY_IMA_EXT_1; clean patch description]
Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent 462a94fb

arch/riscv/include/uapi/asm/hwprobe.h

+3 −0
Original line number Diff line number Diff line
@@ -86,6 +86,7 @@ struct riscv_hwprobe { 
#define		RISCV_HWPROBE_EXT_ZICBOP	(1ULL << 60)

#define		RISCV_HWPROBE_EXT_ZILSD		(1ULL << 61)

#define		RISCV_HWPROBE_EXT_ZCLSD		(1ULL << 62)

#define		RISCV_HWPROBE_EXT_ZICFILP	(1ULL << 63)



#define RISCV_HWPROBE_KEY_CPUPERF_0	5

#define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)
@@ -114,6 +115,8 @@ struct riscv_hwprobe { 
#define RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0	14

#define RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE	15

#define RISCV_HWPROBE_KEY_IMA_EXT_1		16

#define		RISCV_HWPROBE_EXT_ZICFISS	(1ULL << 0)



/* Increase RISCV_HWPROBE_MAX_KEY when adding items. */



/* Flags */

arch/riscv/kernel/sys_hwprobe.c

+3 −2
Original line number Diff line number Diff line
@@ -126,6 +126,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, 
		EXT_KEY(isainfo->isa, ZICBOM, pair->value, missing);

		EXT_KEY(isainfo->isa, ZICBOP, pair->value, missing);

		EXT_KEY(isainfo->isa, ZICBOZ, pair->value, missing);

		EXT_KEY(isainfo->isa, ZICFILP, pair->value, missing);

		EXT_KEY(isainfo->isa, ZICNTR, pair->value, missing);

		EXT_KEY(isainfo->isa, ZICOND, pair->value, missing);

		EXT_KEY(isainfo->isa, ZIHINTNTL, pair->value, missing);
@@ -195,7 +196,7 @@ static void hwprobe_isa_ext1(struct riscv_hwprobe *pair, 
	 * doesn't have.

	 */

	for_each_cpu(cpu, cpus) {

		/* struct riscv_isainfo *isainfo = &hart_isa[cpu]; */

		struct riscv_isainfo *isainfo = &hart_isa[cpu];



		/*

		 * Only use EXT_KEY() for extensions which can be
@@ -203,7 +204,7 @@ static void hwprobe_isa_ext1(struct riscv_hwprobe *pair, 
		 * configuration, as no other checks, besides presence

		 * in the hart_isa bitmap, are made.

		 */

		/* Nothing here yet */

		EXT_KEY(isainfo->isa, ZICFISS, pair->value, missing);

	}



	/* Now turn off reporting features if any CPU is missing it. */