Commit 30f0ced9 authored by Akhil R's avatar Akhil R Committed by Vinod Koul
Browse files

dmaengine: tegra186: Fix residual calculation



The existing residual calculation returns an incorrect value when
bytes_xfer == bytes_req. This scenario occurs particularly with drivers
like UART where DMA is scheduled for maximum number of bytes and is
terminated when the bytes inflow stops. At higher baud rates, it could
request the tx_status while there is no bytes left to transfer. This will
lead to incorrect residual being set. Hence return residual as '0' when
bytes transferred equals to the bytes requested.

Fixes: ee170280 ("dmaengine: tegra: Add tegra gpcdma driver")
Signed-off-by: default avatarAkhil R <akhilrajeev@nvidia.com>
Reviewed-by: default avatarJon Hunter <jonathanh@nvidia.com>
Acked-by: default avatarThierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20240315124411.17582-1-akhilrajeev@nvidia.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 43c633ef
Loading
Loading
Loading
Loading
+3 −0
Original line number Diff line number Diff line
@@ -746,6 +746,9 @@ static int tegra_dma_get_residual(struct tegra_dma_channel *tdc)
	bytes_xfer = dma_desc->bytes_xfer +
		     sg_req[dma_desc->sg_idx].len - (wcount * 4);

	if (dma_desc->bytes_req == bytes_xfer)
		return 0;

	residual = dma_desc->bytes_req - (bytes_xfer % dma_desc->bytes_req);

	return residual;