Commit 30fa9283 authored by Borislav Petkov (AMD)'s avatar Borislav Petkov (AMD)
Browse files

x86/CPU/AMD: Add ZenX generations flags 



Add X86_FEATURE flags for each Zen generation. They should be used from
now on instead of checking f/m/s.

Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: default avatarNikolay Borisov <nik.borisov@suse.com>
Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
Link: http://lore.kernel.org/r/20231120104152.13740-2-bp@alien8.de
parent 5bfa0e45

arch/x86/include/asm/cpufeatures.h

+4 −1
Original line number Diff line number Diff line
@@ -312,6 +312,9 @@ 
#define X86_FEATURE_SRSO_ALIAS		(11*32+25) /* "" AMD BTB untrain RETs through aliasing */

#define X86_FEATURE_IBPB_ON_VMEXIT	(11*32+26) /* "" Issue an IBPB only on VMEXIT */

#define X86_FEATURE_APIC_MSRS_FENCE	(11*32+27) /* "" IA32_TSC_DEADLINE and X2APIC MSRs need fencing */

#define X86_FEATURE_ZEN2		(11*32+28) /* "" CPU based on Zen2 microarchitecture */

#define X86_FEATURE_ZEN3		(11*32+29) /* "" CPU based on Zen3 microarchitecture */

#define X86_FEATURE_ZEN4		(11*32+30) /* "" CPU based on Zen4 microarchitecture */



/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */

#define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */

arch/x86/kernel/cpu/amd.c

+68 −2
Original line number Diff line number Diff line
@@ -616,6 +616,49 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) 
	}



	resctrl_cpu_detect(c);



	/* Figure out Zen generations: */

	switch (c->x86) {

	case 0x17: {

		switch (c->x86_model) {

		case 0x00 ... 0x2f:

		case 0x50 ... 0x5f:

			setup_force_cpu_cap(X86_FEATURE_ZEN);

			break;

		case 0x30 ... 0x4f:

		case 0x60 ... 0x7f:

		case 0x90 ... 0x91:

		case 0xa0 ... 0xaf:

			setup_force_cpu_cap(X86_FEATURE_ZEN2);

			break;

		default:

			goto warn;

		}

		break;

	}

	case 0x19: {

		switch (c->x86_model) {

		case 0x00 ... 0x0f:

		case 0x20 ... 0x5f:

			setup_force_cpu_cap(X86_FEATURE_ZEN3);

			break;

		case 0x10 ... 0x1f:

		case 0x60 ... 0xaf:

			setup_force_cpu_cap(X86_FEATURE_ZEN4);

			break;

		default:

			goto warn;

		}

		break;

	}

	default:

		break;

	}



	return;



warn:

	WARN_ONCE(1, "Family 0x%x, model: 0x%x??\n", c->x86, c->x86_model);

}



static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
@@ -974,8 +1017,6 @@ void init_spectral_chicken(struct cpuinfo_x86 *c) 


static void init_amd_zn(struct cpuinfo_x86 *c)

{

	set_cpu_cap(c, X86_FEATURE_ZEN);



#ifdef CONFIG_NUMA

	node_reclaim_distance = 32;

#endif
@@ -1037,6 +1078,22 @@ static void zenbleed_check(struct cpuinfo_x86 *c) 
	}

}



static void init_amd_zen(struct cpuinfo_x86 *c)

{

}



static void init_amd_zen2(struct cpuinfo_x86 *c)

{

}



static void init_amd_zen3(struct cpuinfo_x86 *c)

{

}



static void init_amd_zen4(struct cpuinfo_x86 *c)

{

}



static void init_amd(struct cpuinfo_x86 *c)

{

	u64 vm_cr;
@@ -1077,6 +1134,15 @@ static void init_amd(struct cpuinfo_x86 *c) 
	case 0x19: init_amd_zn(c); break;

	}



	if (boot_cpu_has(X86_FEATURE_ZEN))

		init_amd_zen(c);

	else if (boot_cpu_has(X86_FEATURE_ZEN2))

		init_amd_zen2(c);

	else if (boot_cpu_has(X86_FEATURE_ZEN3))

		init_amd_zen3(c);

	else if (boot_cpu_has(X86_FEATURE_ZEN4))

		init_amd_zen4(c);



	/*

	 * Enable workaround for FXSAVE leak on CPUs

	 * without a XSaveErPtr feature