Loading arch/arm64/include/asm/kvm_host.h +7 −0 Original line number Diff line number Diff line Loading @@ -621,6 +621,13 @@ extern struct fgt_masks hdfgrtr_masks; extern struct fgt_masks hdfgwtr_masks; extern struct fgt_masks hafgrtr_masks; extern struct fgt_masks kvm_nvhe_sym(hfgrtr_masks); extern struct fgt_masks kvm_nvhe_sym(hfgwtr_masks); extern struct fgt_masks kvm_nvhe_sym(hfgitr_masks); extern struct fgt_masks kvm_nvhe_sym(hdfgrtr_masks); extern struct fgt_masks kvm_nvhe_sym(hdfgwtr_masks); extern struct fgt_masks kvm_nvhe_sym(hafgrtr_masks); struct kvm_cpu_context { struct user_pt_regs regs; /* sp = sp_el0 */ Loading arch/arm64/kvm/arm.c +8 −0 Original line number Diff line number Diff line Loading @@ -2450,6 +2450,14 @@ static void kvm_hyp_init_symbols(void) kvm_nvhe_sym(__icache_flags) = __icache_flags; kvm_nvhe_sym(kvm_arm_vmid_bits) = kvm_arm_vmid_bits; /* Propagate the FGT state to the the nVHE side */ kvm_nvhe_sym(hfgrtr_masks) = hfgrtr_masks; kvm_nvhe_sym(hfgwtr_masks) = hfgwtr_masks; kvm_nvhe_sym(hfgitr_masks) = hfgitr_masks; kvm_nvhe_sym(hdfgrtr_masks) = hdfgrtr_masks; kvm_nvhe_sym(hdfgwtr_masks) = hdfgwtr_masks; kvm_nvhe_sym(hafgrtr_masks) = hafgrtr_masks; /* * Flush entire BSS since part of its data containing init symbols is read * while the MMU is off. Loading arch/arm64/kvm/hyp/nvhe/switch.c +7 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,13 @@ DEFINE_PER_CPU(struct kvm_host_data, kvm_host_data); DEFINE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt); DEFINE_PER_CPU(unsigned long, kvm_hyp_vector); struct fgt_masks hfgrtr_masks; struct fgt_masks hfgwtr_masks; struct fgt_masks hfgitr_masks; struct fgt_masks hdfgrtr_masks; struct fgt_masks hdfgwtr_masks; struct fgt_masks hafgrtr_masks; extern void kvm_nvhe_prepare_backtrace(unsigned long fp, unsigned long pc); static void __activate_cptr_traps(struct kvm_vcpu *vcpu) Loading Loading
arch/arm64/include/asm/kvm_host.h +7 −0 Original line number Diff line number Diff line Loading @@ -621,6 +621,13 @@ extern struct fgt_masks hdfgrtr_masks; extern struct fgt_masks hdfgwtr_masks; extern struct fgt_masks hafgrtr_masks; extern struct fgt_masks kvm_nvhe_sym(hfgrtr_masks); extern struct fgt_masks kvm_nvhe_sym(hfgwtr_masks); extern struct fgt_masks kvm_nvhe_sym(hfgitr_masks); extern struct fgt_masks kvm_nvhe_sym(hdfgrtr_masks); extern struct fgt_masks kvm_nvhe_sym(hdfgwtr_masks); extern struct fgt_masks kvm_nvhe_sym(hafgrtr_masks); struct kvm_cpu_context { struct user_pt_regs regs; /* sp = sp_el0 */ Loading
arch/arm64/kvm/arm.c +8 −0 Original line number Diff line number Diff line Loading @@ -2450,6 +2450,14 @@ static void kvm_hyp_init_symbols(void) kvm_nvhe_sym(__icache_flags) = __icache_flags; kvm_nvhe_sym(kvm_arm_vmid_bits) = kvm_arm_vmid_bits; /* Propagate the FGT state to the the nVHE side */ kvm_nvhe_sym(hfgrtr_masks) = hfgrtr_masks; kvm_nvhe_sym(hfgwtr_masks) = hfgwtr_masks; kvm_nvhe_sym(hfgitr_masks) = hfgitr_masks; kvm_nvhe_sym(hdfgrtr_masks) = hdfgrtr_masks; kvm_nvhe_sym(hdfgwtr_masks) = hdfgwtr_masks; kvm_nvhe_sym(hafgrtr_masks) = hafgrtr_masks; /* * Flush entire BSS since part of its data containing init symbols is read * while the MMU is off. Loading
arch/arm64/kvm/hyp/nvhe/switch.c +7 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,13 @@ DEFINE_PER_CPU(struct kvm_host_data, kvm_host_data); DEFINE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt); DEFINE_PER_CPU(unsigned long, kvm_hyp_vector); struct fgt_masks hfgrtr_masks; struct fgt_masks hfgwtr_masks; struct fgt_masks hfgitr_masks; struct fgt_masks hdfgrtr_masks; struct fgt_masks hdfgwtr_masks; struct fgt_masks hafgrtr_masks; extern void kvm_nvhe_prepare_backtrace(unsigned long fp, unsigned long pc); static void __activate_cptr_traps(struct kvm_vcpu *vcpu) Loading