Commit 3164899c authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Add description of FGT bits leading to EC!=0x18 



The current FTP tables are only concerned with the bits generating
ESR_ELx.EC==0x18. However, we want an exhaustive view of what KVM
really knows about.

So let's add another small table that provides that extra information.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 1b8570be

arch/arm64/kvm/emulate-nested.c

+30 −6
Original line number Diff line number Diff line
@@ -1279,16 +1279,21 @@ enum fg_filter_id { 
	__NR_FG_FILTER_IDS__

};



#define SR_FGF(sr, g, b, p, f)					\

#define __FGT(g, b, p, f)					\

		{						\

		.encoding	= sr,				\

		.end		= sr,				\

		.tc		= {				\

			.fgt = g ## _GROUP,			\

			.bit = g ## _EL2_ ## b ## _SHIFT,	\

			.pol = p,				\

			.fgf = f,				\

		},						\

		}



#define FGT(g, b, p)		__FGT(g, b, p, __NO_FGF__)



#define SR_FGF(sr, g, b, p, f)					\

	{							\

		.encoding	= sr,				\

		.end		= sr,				\

		.tc		= __FGT(g, b, p, f),		\

		.line = __LINE__,				\

	}
@@ -1989,6 +1994,18 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = { 
	SR_FGT(SYS_AMEVCNTR0_EL0(0),	HAFGRTR, AMEVCNTR00_EL0, 1),

};



/*

 * Additional FGTs that do not fire with ESR_EL2.EC==0x18. This table

 * isn't used for exception routing, but only as a promise that the

 * trap is handled somewhere else.

 */

static const union trap_config non_0x18_fgt[] __initconst = {

	FGT(HFGITR, nGCSSTR_EL1, 0),

	FGT(HFGITR, SVC_EL1, 1),

	FGT(HFGITR, SVC_EL0, 1),

	FGT(HFGITR, ERET, 1),

};



static union trap_config get_trap_config(u32 sysreg)

{

	return (union trap_config) {
@@ -2203,6 +2220,13 @@ int __init populate_nv_trap_config(void) 
		}

	}



	for (int i = 0; i < ARRAY_SIZE(non_0x18_fgt); i++) {

		if (!aggregate_fgt(non_0x18_fgt[i])) {

			ret = -EINVAL;

			kvm_err("non_0x18_fgt[%d] is reserved\n", i);

		}

	}



	ret = check_all_fgt_masks(ret);



	kvm_info("nv: %ld fine grained trap handlers\n",