Commit 31663521 authored by Nicholas Kazlauskas's avatar Nicholas Kazlauskas Committed by Alex Deucher
Browse files

drm/amd/display: Use gpuvm_min_page_size_kbytes for DML2 surfaces 



[Why]
It's currently hard coded to 256 when it should be using the SOC
provided values. This can result in corruption with linear surfaces
where we prefetch more PTE than the buffer can hold.

[How]
Update the min page size correctly for the plane.

Signed-off-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: default avatarJun Lei <jun.lei@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarRodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4067f4fa

drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c

+14 −6
Original line number Diff line number Diff line
@@ -954,7 +954,9 @@ static void get_scaler_data_for_plane(const struct dc_plane_state *in, struct dc 
	memcpy(out, &temp_pipe->plane_res.scl_data, sizeof(*out));

}



static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned int location, const struct dc_stream_state *in)

static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned int location,

					 const struct dc_stream_state *in,

					 const struct soc_bounding_box_st *soc)

{

	dml_uint_t width, height;
@@ -971,7 +973,7 @@ static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned 
	out->CursorBPP[location] = dml_cur_32bit;

	out->CursorWidth[location] = 256;



	out->GPUVMMinPageSizeKBytes[location] = 256;

	out->GPUVMMinPageSizeKBytes[location] = soc->gpuvm_min_page_size_kbytes;



	out->ViewportWidth[location] = width;

	out->ViewportHeight[location] = height;
@@ -1008,7 +1010,9 @@ static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned 
	out->ScalerEnabled[location] = false;

}



static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out, unsigned int location, const struct dc_plane_state *in, struct dc_state *context)

static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out, unsigned int location,

						    const struct dc_plane_state *in, struct dc_state *context,

						    const struct soc_bounding_box_st *soc)

{

	struct scaler_data *scaler_data = kzalloc(sizeof(*scaler_data), GFP_KERNEL);

	if (!scaler_data)
@@ -1019,7 +1023,7 @@ static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out 
	out->CursorBPP[location] = dml_cur_32bit;

	out->CursorWidth[location] = 256;



	out->GPUVMMinPageSizeKBytes[location] = 256;

	out->GPUVMMinPageSizeKBytes[location] = soc->gpuvm_min_page_size_kbytes;



	out->ViewportWidth[location] = scaler_data->viewport.width;

	out->ViewportHeight[location] = scaler_data->viewport.height;
@@ -1332,7 +1336,8 @@ void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_stat 
			disp_cfg_plane_location = dml_dispcfg->num_surfaces++;



			populate_dummy_dml_surface_cfg(&dml_dispcfg->surface, disp_cfg_plane_location, context->streams[i]);

			populate_dummy_dml_plane_cfg(&dml_dispcfg->plane, disp_cfg_plane_location, context->streams[i]);

			populate_dummy_dml_plane_cfg(&dml_dispcfg->plane, disp_cfg_plane_location,

						     context->streams[i], &dml2->v20.dml_core_ctx.soc);



			dml_dispcfg->plane.BlendingAndTiming[disp_cfg_plane_location] = disp_cfg_stream_location;
@@ -1348,7 +1353,10 @@ void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_stat 
				ASSERT(disp_cfg_plane_location >= 0 && disp_cfg_plane_location <= __DML2_WRAPPER_MAX_STREAMS_PLANES__);



				populate_dml_surface_cfg_from_plane_state(dml2->v20.dml_core_ctx.project, &dml_dispcfg->surface, disp_cfg_plane_location, context->stream_status[i].plane_states[j]);

				populate_dml_plane_cfg_from_plane_state(&dml_dispcfg->plane, disp_cfg_plane_location, context->stream_status[i].plane_states[j], context);

				populate_dml_plane_cfg_from_plane_state(

					&dml_dispcfg->plane, disp_cfg_plane_location,

					context->stream_status[i].plane_states[j], context,

					&dml2->v20.dml_core_ctx.soc);



				if (stream_mall_type == SUBVP_MAIN) {

					dml_dispcfg->plane.UseMALLForPStateChange[disp_cfg_plane_location] = dml_use_mall_pstate_change_sub_viewport;