Commit 319aca88 authored by Abhinav Kumar's avatar Abhinav Kumar
Browse files

drm/msm/dp: reset the link phy params before link training 



Before re-starting link training reset the link phy params namely
the pre-emphasis and voltage swing levels otherwise the next
link training begins at the previously cached levels which can result
in link training failures.

Fixes: 8ede2ecc ("drm/msm/dp: Add DP compliance tests on Snapdragon Chipsets")
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # SM8350-HDK
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/605946/
Link: https://lore.kernel.org/r/20240725220450.131245-1-quic_abhinavk@quicinc.com


Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
parent aedf02e4

drivers/gpu/drm/msm/dp/dp_ctrl.c

+2 −0
Original line number Diff line number Diff line
@@ -1286,6 +1286,8 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl, 
	link_info.rate = ctrl->link->link_params.rate;

	link_info.capabilities = DP_LINK_CAP_ENHANCED_FRAMING;



	dp_link_reset_phy_params_vx_px(ctrl->link);



	dp_aux_link_configure(ctrl->aux, &link_info);



	if (drm_dp_max_downspread(dpcd))