Commit 31a1f875 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'phy-mediatek-reorg'

Sky Huang says:

====================
Re-organize MediaTek ethernet phy drivers and propose mtk-phy-lib

This patchset comes from patch 1/9, 3/9, 4/9, 5/9 and 7/9 of:
https://lore.kernel.org/netdev/20241004102413.5838-1-SkyLake.Huang@mediatek.com/



This patchset changes MediaTek's ethernet phy's folder structure and
integrates helper functions, including LED & token ring manipulation,
into mtk-phy-lib.

---
Change in v2:
- Add correct Reviewed-by tag in each patch.

Change in v3:
[patch 4/5]
- Fix kernel test robot error by adding missing MTK_NET_PHYLIB.
====================

Signed-off-by: default avatarSky Huang <skylake.huang@mediatek.com>
parents 8545b75b 219cecbb
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+4 −2
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@@ -14439,8 +14439,10 @@ M: Qingfang Deng <dqfext@gmail.com>
M:	SkyLake Huang <SkyLake.Huang@mediatek.com>
L:	netdev@vger.kernel.org
S:	Maintained
F:	drivers/net/phy/mediatek-ge-soc.c
F:	drivers/net/phy/mediatek-ge.c
F:	drivers/net/phy/mediatek/mtk-ge-soc.c
F:	drivers/net/phy/mediatek/mtk-phy-lib.c
F:	drivers/net/phy/mediatek/mtk-ge.c
F:	drivers/net/phy/mediatek/mtk.h
F:	drivers/phy/mediatek/phy-mtk-xfi-tphy.c
MEDIATEK I2C CONTROLLER DRIVER
+1 −16
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@@ -266,22 +266,7 @@ config MAXLINEAR_GPHY
	  Support for the Maxlinear GPY115, GPY211, GPY212, GPY215,
	  GPY241, GPY245 PHYs.

config MEDIATEK_GE_PHY
	tristate "MediaTek Gigabit Ethernet PHYs"
	help
	  Supports the MediaTek Gigabit Ethernet PHYs.

config MEDIATEK_GE_SOC_PHY
	tristate "MediaTek SoC Ethernet PHYs"
	depends on (ARM64 && ARCH_MEDIATEK) || COMPILE_TEST
	depends on NVMEM_MTK_EFUSE
	help
	  Supports MediaTek SoC built-in Gigabit Ethernet PHYs.

	  Include support for built-in Ethernet PHYs which are present in
	  the MT7981 and MT7988 SoCs. These PHYs need calibration data
	  present in the SoCs efuse and will dynamically calibrate VCM
	  (common-mode voltage) during startup.
source "drivers/net/phy/mediatek/Kconfig"

config MICREL_PHY
	tristate "Micrel PHYs"
+1 −2
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@@ -74,8 +74,7 @@ obj-$(CONFIG_MARVELL_PHY) += marvell.o
obj-$(CONFIG_MARVELL_88Q2XXX_PHY)	+= marvell-88q2xxx.o
obj-$(CONFIG_MARVELL_88X2222_PHY)	+= marvell-88x2222.o
obj-$(CONFIG_MAXLINEAR_GPHY)	+= mxl-gpy.o
obj-$(CONFIG_MEDIATEK_GE_PHY)	+= mediatek-ge.o
obj-$(CONFIG_MEDIATEK_GE_SOC_PHY)	+= mediatek-ge-soc.o
obj-y				+= mediatek/
obj-$(CONFIG_MESON_GXL_PHY)	+= meson-gxl.o
obj-$(CONFIG_MICREL_KS8995MA)	+= spi_ks8995.o
obj-$(CONFIG_MICREL_PHY)	+= micrel.o
+27 −0
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# SPDX-License-Identifier: GPL-2.0-only
config MTK_NET_PHYLIB
	tristate

config MEDIATEK_GE_PHY
	tristate "MediaTek Gigabit Ethernet PHYs"
	select MTK_NET_PHYLIB
	help
	  Supports the MediaTek non-built-in Gigabit Ethernet PHYs.

	  Non-built-in Gigabit Ethernet PHYs include mt7530/mt7531.
	  You may find mt7530 inside mt7621. This driver shares some
	  common operations with MediaTek SoC built-in Gigabit
	  Ethernet PHYs.

config MEDIATEK_GE_SOC_PHY
	tristate "MediaTek SoC Ethernet PHYs"
	depends on (ARM64 && ARCH_MEDIATEK) || COMPILE_TEST
	depends on NVMEM_MTK_EFUSE
	select MTK_NET_PHYLIB
	help
	  Supports MediaTek SoC built-in Gigabit Ethernet PHYs.

	  Include support for built-in Ethernet PHYs which are present in
	  the MT7981 and MT7988 SoCs. These PHYs need calibration data
	  present in the SoCs efuse and will dynamically calibrate VCM
	  (common-mode voltage) during startup.
+4 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_MTK_NET_PHYLIB)		+= mtk-phy-lib.o
obj-$(CONFIG_MEDIATEK_GE_PHY)		+= mtk-ge.o
obj-$(CONFIG_MEDIATEK_GE_SOC_PHY)	+= mtk-ge-soc.o
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