Commit 31be791e authored by Chris Packham's avatar Chris Packham Committed by Gregory CLEMENT
Browse files

arm64: dts: marvell: Add UART1-3 for AC5/AC5X 



The AC5/AC5X SoC has 4 UART blocks. Add the additional UART1-3 blocks to
the base dtsi file.

Signed-off-by: default avatarChris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 568035b0

arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi

+30 −0
Original line number Diff line number Diff line
@@ -95,6 +95,36 @@ uart0: serial@12000 { 
				status = "okay";

			};



			uart1: serial@12100 {

				compatible = "snps,dw-apb-uart";

				reg = <0x11000 0x100>;

				reg-shift = <2>;

				interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;

				reg-io-width = <1>;

				clocks = <&cnm_clock>;

				status = "disabled";

			};



			uart2: serial@12200 {

				compatible = "snps,dw-apb-uart";

				reg = <0x12200 0x100>;

				reg-shift = <2>;

				interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;

				reg-io-width = <1>;

				clocks = <&cnm_clock>;

				status = "disabled";

			};



			uart3: serial@12300 {

				compatible = "snps,dw-apb-uart";

				reg = <0x12300 0x100>;

				reg-shift = <2>;

				interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

				reg-io-width = <1>;

				clocks = <&cnm_clock>;

				status = "disabled";

			};



			mdio: mdio@22004 {

				#address-cells = <1>;

				#size-cells = <0>;