Commit 3214fae8 authored by Przemyslaw Korba's avatar Przemyslaw Korba Committed by Tony Nguyen
Browse files

ice: fix PHY timestamp extraction for ETH56G 



Fix incorrect PHY timestamp extraction for ETH56G.
It's better to use FIELD_PREP() than manual shift.

Fixes: 7cab44f1 ("ice: Introduce ETH56G PHY model for E825C products")
Reviewed-by: default avatarPrzemek Kitszel <przemyslaw.kitszel@intel.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Signed-off-by: default avatarPrzemyslaw Korba <przemyslaw.korba@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent 01fd68e5

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

+2 −1
Original line number Diff line number Diff line
@@ -1518,7 +1518,8 @@ static int ice_read_ptp_tstamp_eth56g(struct ice_hw *hw, u8 port, u8 idx, 
	 * lower 8 bits in the low register, and the upper 32 bits in the high

	 * register.

	 */

	*tstamp = ((u64)hi) << TS_PHY_HIGH_S | ((u64)lo & TS_PHY_LOW_M);

	*tstamp = FIELD_PREP(TS_PHY_HIGH_M, hi) |

		  FIELD_PREP(TS_PHY_LOW_M, lo);



	return 0;

}

drivers/net/ethernet/intel/ice/ice_ptp_hw.h

+2 −3
Original line number Diff line number Diff line
@@ -682,9 +682,8 @@ static inline bool ice_is_dual(struct ice_hw *hw) 
#define TS_HIGH_M			0xFF

#define TS_HIGH_S			32



#define TS_PHY_LOW_M			0xFF

#define TS_PHY_HIGH_M			0xFFFFFFFF

#define TS_PHY_HIGH_S			8

#define TS_PHY_LOW_M			GENMASK(7, 0)

#define TS_PHY_HIGH_M			GENMASK_ULL(39, 8)



#define BYTES_PER_IDX_ADDR_L_U		8

#define BYTES_PER_IDX_ADDR_L		4