Commit 321e0ffa authored by Ian Rogers's avatar Ian Rogers Committed by Namhyung Kim
Browse files

perf vendor events: Add/update tigerlake events/metrics 

Update events from v1.15 to v1.16.
Update TMA metrics from v4.7 to v4.8.

Bring in the event updates v1.16:
https://github.com/intel/perfmon/commit/43f3b8d6f82f3174bd3bffe8587e2179f086d2ce

The TMA 4.8 information was added in:
https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736

Add counter information. The most recent RFC patch set using this
information:
https://lore.kernel.org/lkml/20240412210756.309828-1-weilin.wang@intel.com/



Co-authored-by: default avatarWeilin Wang <weilin.wang@intel.com>
Co-authored-by: default avatarCaleb Biggers <caleb.biggers@intel.com>
Signed-off-by: default avatarIan Rogers <irogers@google.com>
Reviewed-by: default avatarKan Liang <kan.liang@linux.intel.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: default avatarNamhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20240620181752.3945845-35-irogers@google.com
parent 7c79eb5c

tools/perf/pmu-events/arch/x86/mapfile.csv

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Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core 
GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v59,skylake,core

GenuineIntel-6-55-[01234],v1.35,skylakex,core

GenuineIntel-6-86,v1.23,snowridgex,core

GenuineIntel-6-8[CD],v1.15,tigerlake,core

GenuineIntel-6-8[CD],v1.16,tigerlake,core

GenuineIntel-6-2C,v5,westmereep-dp,core

GenuineIntel-6-25,v4,westmereep-sp,core

GenuineIntel-6-2F,v4,westmereex,core

tools/perf/pmu-events/arch/x86/tigerlake/cache.json

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tools/perf/pmu-events/arch/x86/tigerlake/counter.json

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[

    {

        "Unit": "core",

        "CountersNumFixed": "4",

        "CountersNumGeneric": "8"

    },

    {

        "Unit": "ARB",

        "CountersNumFixed": "0",

        "CountersNumGeneric": "2"

    },

    {

        "Unit": "CLOCK",

        "CountersNumFixed": 1,

        "CountersNumGeneric": "0"

    }

]
 
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tools/perf/pmu-events/arch/x86/tigerlake/floating-point.json

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tools/perf/pmu-events/arch/x86/tigerlake/frontend.json

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