Commit 3285c471 authored by James Clark's avatar James Clark Committed by Suzuki K Poulose
Browse files

coresight: Remove misleading definitions 



ETM_OPT_* definitions duplicate the PMU format attributes that have
always been published in sysfs. Hardcoding them here makes it misleading
as to what the 'real' PMU API is and prevents attributes from being
rearranged in the future.

ETM4_CFG_BIT_* definitions just define what the Arm Architecture is
which is not the responsibility of the kernel to do and doesn't scale to
other registers or versions of ETM. It's not an actual software ABI/API
and these definitions here mislead that it is.

Any tools using the first ones would be broken anyway as they won't work
when attributes are moved, so removing them is the right thing to do and
will prompt a fix. Tools using the second ones can trivially redefine
them locally.

Perf also has its own copy of the headers so both of these things can be
fixed up at a later date.

Reviewed-by: default avatarLeo Yan <leo.yan@arm.com>
Reviewed-by: default avatarMike Leach <mike.leach@linaro.org>
Tested-by: default avatarLeo Yan <leo.yan@arm.com>
Signed-off-by: default avatarJames Clark <james.clark@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-10-4d319764cc58@linaro.org
parent afed86e6

include/linux/coresight-pmu.h

+0 −24
Original line number Diff line number Diff line
@@ -21,30 +21,6 @@ 
 */

#define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu)  (0x10 + (cpu * 2))



/*

 * Below are the definition of bit offsets for perf option, and works as

 * arbitrary values for all ETM versions.

 *

 * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,

 * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and

 * directly use below macros as config bits.

 */

#define ETM_OPT_BRANCH_BROADCAST 8

#define ETM_OPT_CYCACC		12

#define ETM_OPT_CTXTID		14

#define ETM_OPT_CTXTID2		15

#define ETM_OPT_TS		28

#define ETM_OPT_RETSTK		29



/* ETMv4 CONFIGR programming bits for the ETM OPTs */

#define ETM4_CFG_BIT_BB         3

#define ETM4_CFG_BIT_CYCACC	4

#define ETM4_CFG_BIT_CTXTID	6

#define ETM4_CFG_BIT_VMID	7

#define ETM4_CFG_BIT_TS		11

#define ETM4_CFG_BIT_RETSTK	12

#define ETM4_CFG_BIT_VMID_OPT	15



/*

 * Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload.

 * Used to associate a CPU with the CoreSight Trace ID.