Commit 32b366a5 authored by Roger Quadros's avatar Roger Quadros Committed by Vignesh Raghavendra
Browse files

arm64: dts: ti: Add DT overlay for PCIe + USB2.0 SERDES personality card 

Enable both SERDES and PCIe DT nodes in order to get PCIe working on
the SERDES PCIe x2 personality card.

The daughter card also has a USB 2.0 dual-role port. As the base board
already supports a 2.0 dual-role port, enable the port on the SERDES
card to be a host only port.

This will prevent user confusion as having 2 ports in device mode often
leads to confusion as to which port is bound to the gadget function driver.

The PCIe x2 card is provided with the AM65x IDK configuration [1]
so apply the overlay to k3-am654-idk.dtb

[1] https://www.ti.com/lit/ug/spruim6a/spruim6a.pdf



Co-developed-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20240208-for-v6-9-am65-overlays-2-0-v2-2-70bae3e91597@kernel.org


Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent 8ada14ca

arch/arm64/boot/dts/ti/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo 
# Boards with AM65x SoC

k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo

k3-am654-evm-dtbs := k3-am654-base-board.dtb k3-am654-icssg2.dtbo

k3-am654-idk-dtbs := k3-am654-evm.dtb k3-am654-idk.dtbo

k3-am654-idk-dtbs := k3-am654-evm.dtb k3-am654-idk.dtbo k3-am654-pcie-usb2.dtbo

dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb

dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb

dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb
@@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-gp-evm.dtb 
dtb-$(CONFIG_ARCH_K3) += k3-am654-evm.dtb

dtb-$(CONFIG_ARCH_K3) += k3-am654-idk.dtb

dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board-rocktech-rk101-panel.dtbo

dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb2.dtbo



# Boards with J7200 SoC

k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo

arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso

0 → 100644
+59 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only OR MIT

/**

 * DT overlay for SERDES personality card: 2lane PCIe + USB2.0 Host on AM654 EVM

 *

 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/

 */



/dts-v1/;

/plugin/;

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/phy/phy.h>

#include <dt-bindings/phy/phy-am654-serdes.h>

#include "k3-pinctrl.h"



&serdes0 {

	assigned-clocks = <&k3_clks 153 4>,

			  <&serdes0 AM654_SERDES_CMU_REFCLK>,

			  <&serdes0 AM654_SERDES_RO_REFCLK>;

	assigned-clock-parents = <&k3_clks 153 8>,

				 <&k3_clks 153 4>,

				 <&k3_clks 153 4>;

	status = "okay";

};



&serdes1 {

	assigned-clocks = <&serdes1 AM654_SERDES_CMU_REFCLK>;

	assigned-clock-parents = <&serdes0 AM654_SERDES_RO_REFCLK>;

	status = "okay";

};



&pcie0_rc {

	num-lanes = <2>;

	phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>;

	phy-names = "pcie-phy0", "pcie-phy1";

	reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;

	status = "okay";

};



&main_pmx0 {

       usb0_pins_default: usb0-default-pins {

		pinctrl-single,pins = <

			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */

		>;

	};

};



&dwc3_0 {

	status = "okay";

};



&usb0_phy {

	status = "okay";

};



&usb0 {

	pinctrl-names = "default";

	pinctrl-0 = <&usb0_pins_default>;

	dr_mode = "host";

};