Commit 32e73fef authored by José Roberto de Souza's avatar José Roberto de Souza Committed by Radhakrishna Sripada
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drm/i915/xe2hpd: Properly disable power in port A 



Xe2_HPD has a different value to power down port A.

BSpec: 65450
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: default avatarBalasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240430172850.1881525-6-radhakrishna.sripada@intel.com
parent 68cd7371

drivers/gpu/drm/i915/display/intel_cx0_phy.c

+14 −3
Original line number Diff line number Diff line
@@ -2900,17 +2900,28 @@ void intel_mtl_pll_enable(struct intel_encoder *encoder, 
		intel_cx0pll_enable(encoder, crtc_state);

}



static u8 cx0_power_control_disable_val(struct intel_encoder *encoder)

{

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);



	if (intel_encoder_is_c10phy(encoder))

		return CX0_P2PG_STATE_DISABLE;



	if (IS_BATTLEMAGE(i915) && encoder->port == PORT_A)

		return CX0_P2PG_STATE_DISABLE;



	return CX0_P4PG_STATE_DISABLE;

}



static void intel_cx0pll_disable(struct intel_encoder *encoder)

{

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	enum phy phy = intel_encoder_to_phy(encoder);

	bool is_c10 = intel_encoder_is_c10phy(encoder);

	intel_wakeref_t wakeref = intel_cx0_phy_transaction_begin(encoder);



	/* 1. Change owned PHY lane power to Disable state. */

	intel_cx0_powerdown_change_sequence(encoder, INTEL_CX0_BOTH_LANES,

					    is_c10 ? CX0_P2PG_STATE_DISABLE :

					    CX0_P4PG_STATE_DISABLE);

					    cx0_power_control_disable_val(encoder));



	/*

	 * 2. Follow the Display Voltage Frequency Switching Sequence Before