Commit 32eab46a authored by Umesh Nerlige Ramappa's avatar Umesh Nerlige Ramappa
Browse files

drm/xe/soc_remapper: Use SoC remapper helper from VSEC code



Since different drivers can use SoC remapper, modify VSEC code to
access SoC remapper via a helper that would synchronize such accesses.

Signed-off-by: default avatarUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: default avatarBadal Nilawar <badal.nilawar@intel.com>
Link: https://patch.msgid.link/20251223183943.3175941-7-umesh.nerlige.ramappa@intel.com
parent a9f88c68
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+0 −3
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@@ -18,9 +18,6 @@
#define BMG_TELEMETRY_BASE_OFFSET	0xE0000
#define BMG_TELEMETRY_OFFSET		(SOC_BASE + BMG_TELEMETRY_BASE_OFFSET)

#define SG_REMAP_INDEX1			XE_REG(SOC_BASE + 0x08)
#define   SG_REMAP_BITS			REG_GENMASK(31, 24)

#define BMG_MODS_RESIDENCY_OFFSET		(0x4D0)
#define BMG_G2_RESIDENCY_OFFSET		(0x530)
#define BMG_G6_RESIDENCY_OFFSET		(0x538)
+13 −0
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/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2025 Intel Corporation
 */
#ifndef _XE_SOC_REMAPPER_REGS_H_
#define _XE_SOC_REMAPPER_REGS_H_

#include "xe_regs.h"

#define SG_REMAP_INDEX1			XE_REG(SOC_BASE + 0x08)
#define   SG_REMAP_TELEM_MASK		REG_GENMASK(31, 24)

#endif
+5 −0
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@@ -334,6 +334,8 @@ struct xe_device {
		u8 has_pxp:1;
		/** @info.has_range_tlb_inval: Has range based TLB invalidations */
		u8 has_range_tlb_inval:1;
		/** @info.has_soc_remapper_telem: Has SoC remapper telemetry support */
		u8 has_soc_remapper_telem:1;
		/** @info.has_sriov: Supports SR-IOV */
		u8 has_sriov:1;
		/** @info.has_usm: Device has unified shared memory support */
@@ -582,6 +584,9 @@ struct xe_device {
	struct {
		/** @soc_remapper.lock: Serialize access to SoC Remapper's index registers */
		spinlock_t lock;

		/** @soc_remapper.set_telem_region: Set telemetry index */
		void (*set_telem_region)(struct xe_device *xe, u32 index);
	} soc_remapper;

	/**
+3 −0
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@@ -370,6 +370,7 @@ static const struct xe_device_desc bmg_desc = {
	.has_i2c = true,
	.has_late_bind = true,
	.has_pre_prod_wa = 1,
	.has_soc_remapper_telem = true,
	.has_sriov = true,
	.has_mem_copy_instr = true,
	.max_gt_per_tile = 2,
@@ -421,6 +422,7 @@ static const struct xe_device_desc cri_desc = {
	.has_mbx_power_limits = true,
	.has_mert = true,
	.has_pre_prod_wa = 1,
	.has_soc_remapper_telem = true,
	.has_sriov = true,
	.max_gt_per_tile = 2,
	.require_force_probe = true,
@@ -692,6 +694,7 @@ static int xe_info_init_early(struct xe_device *xe,
	xe->info.has_page_reclaim_hw_assist = desc->has_page_reclaim_hw_assist;
	xe->info.has_pre_prod_wa = desc->has_pre_prod_wa;
	xe->info.has_pxp = desc->has_pxp;
	xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem;
	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
		desc->has_sriov;
	xe->info.has_mem_copy_instr = desc->has_mem_copy_instr;
+1 −0
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@@ -53,6 +53,7 @@ struct xe_device_desc {
	u8 has_pre_prod_wa:1;
	u8 has_page_reclaim_hw_assist:1;
	u8 has_pxp:1;
	u8 has_soc_remapper_telem:1;
	u8 has_sriov:1;
	u8 needs_scratch:1;
	u8 skip_guc_pc:1;
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